公开(公告)号：US08975180B2

公开(公告)日：2015-03-10

申请号：US14257694

申请日：2014-04-21

Applicant: Intermolecular, Inc.

Inventor： Thomas R. Boussie ,  David E. Lazovsky ,  Sandra G. Malhotra

IPC: H01L21/44 ,  H01L21/768 ,  B82Y30/00

CPC classification number: H01L21/7685 ,  B82Y30/00 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/288 ,  H01L21/31 ,  H01L21/76834

Abstract: A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case, capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, can be used to form the masking layer. The capping layer can be formed of an conductive material, a semiconductor material, or an insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.

Abstract translation: 在电子器件的电介质区域上形成掩模层，使得在随后在由电介质区域分离的电子器件的导电区域上形成覆盖层时，掩模层阻止在其上形成覆盖层材料 在电介质区域。 可以选择性地在导电区域或非选择性地形成覆盖层; 在任一种情况下，形成在电介质区域上的覆盖层材料随后可以被去除，从而确保覆盖层材料仅在导电区域上形成。 硅烷类材料可用于形成掩模层。 覆盖层可以由导电材料，半导体材料或绝缘材料形成，并且可以使用包括常规沉积工艺如无电沉积，化学气相沉积，物理气相沉积或原子层沉积的任何适当的工艺形成。

公开(公告)号：US08709943B2

公开(公告)日：2014-04-29

申请号：US13892516

申请日：2013-05-13

Applicant: Intermolecular, Inc.

Inventor： Thomas R. Boussie ,  David E. Lazovsky ,  Sandra G. Malhotra

IPC: H01L21/44

CPC classification number: H01L21/7685 ,  B82Y30/00 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/288 ,  H01L21/31 ,  H01L21/76834

Abstract: A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case, capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, can be used to form the masking layer. The capping layer can be formed of an conductive material, a semiconductor material, or an insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.

Abstract translation: 在电子器件的电介质区域上形成掩模层，使得在随后在由电介质区域分离的电子器件的导电区域上形成覆盖层时，掩模层阻止在其上形成覆盖层材料 在电介质区域。 可以选择性地在导电区域或非选择性地形成覆盖层; 在任一种情况下，形成在电介质区域上的覆盖层材料随后可以被去除，从而确保覆盖层材料仅在导电区域上形成。 硅烷类材料可用于形成掩模层。 覆盖层可以由导电材料，半导体材料或绝缘材料形成，并且可以使用包括常规沉积工艺如无电沉积，化学气相沉积，物理气相沉积或原子层沉积的任何适当的工艺形成。

公开(公告)号：US20130056101A1

公开(公告)日：2013-03-07

申请号：US13661501

申请日：2012-10-26

Applicant: INTERMOLECULAR, INC.

Inventor： Thomas R. Boussie ,  Tony P. Chiang ,  Alexander Gorer ,  David E. Lazovsky

IPC: F03B11/02

CPC classification number: H01L21/67011 ,  C23C14/54 ,  C23C16/4412 ,  C23C16/45544 ,  C23C16/4557 ,  C23C16/45578 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/52 ,  H01J37/32449 ,  H01J37/32513 ,  H01J37/32724 ,  H01J2237/166 ,  H01J2237/20228 ,  H01J2237/20235 ,  H01L21/6715 ,  H01L21/76849 ,  H01L22/20 ,  H01L2924/0002 ,  Y10S438/907 ,  Y10S438/913 ,  Y10T137/8593 ,  H01L2924/00

Abstract: The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used in integrated circuit fabrication. A substrate having an array of differentially processed regions thereon is processed by delivering materials to or modifying regions of the substrate.

Abstract translation: 本发明提供了用于基板区域的离散化，组合处理的方法和系统，例如用于集成电路制造中使用的新材料，工艺和工艺顺序集成方案的发现，实现，优化和鉴定。 通过将材料输送到衬底或修改衬底的区域来处理其上具有差分处理区域阵列的衬底。