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    WIRELESS TEST SYSTEM FOR TESTING MICROELECTRONIC DEVICES INTEGRATED WITH ANTENNA
    24.
    发明申请
    WIRELESS TEST SYSTEM FOR TESTING MICROELECTRONIC DEVICES INTEGRATED WITH ANTENNA 审中-公开

    公开(公告)号：US20190310314A1

    公开(公告)日：2019-10-10

    申请号：US16359954

    申请日：2019-03-20

    Applicant: MEDIATEK INC.

    Inventor： Chih-Yang Liu ,  Ying-Chou Shih ,  Yen-Ju Lu ,  Chih-Ming Hung ,  Jui-Lin Hsu

    IPC: G01R31/302 ,  H01Q1/22 ,  G01R31/303 ,  G01R31/28

    Abstract: A wireless test system includes a load board having an upper surface and a lower surface. The load board has a testing antenna disposed on the load board. A socket for receiving a device under test (DUT) having an antenna structure therein is disposed on the upper surface of the load board. The antenna structure is aligned with the testing antenna. The wireless test system further includes a handler for picking up and delivering the DUT to the socket. The handler has a clamp for holding and pressing the DUT. The clamp is grounded during testing and functions as a ground reflector that reflects and reverses radiation pattern of the DUT from an upward direction to a downward direction toward the testing antenna.

    Harmonic rejection translational filter
    25.
    发明授权
    Harmonic rejection translational filter 有权

    公开(公告)号：US09871487B2

    公开(公告)日：2018-01-16

    申请号：US15125148

    申请日：2015-03-13

    Applicant: MEDIATEK INC.

    Inventor： Ying-Tsang Lu ,  Chih-Ming Hung ,  Meng-Chang Lee

    IPC: H03K5/00 ,  H03D7/04 ,  H03D7/14 ,  H03H11/04

    CPC classification number: H03D7/1483 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D2200/0086 ,  H03H11/0405 ,  H03H11/0466 ,  H03H19/002

    Abstract: A harmonic translational filter includes a first path, a second path and a signal combiner. The first path has a first translational filter that is driven by a plurality of first oscillation signals, and is arranged to generate a first output signal according to an input signal. The second path has a second translation filter that is driven by a plurality of second oscillation signals that are different from the first oscillation signals in phase. The second path is coupled to the first path and arranged to generate a second output signal according to the input signal. The signal combiner is coupled to the first path and the second path, and arranged to combine the first output signal and the second output signal to generate a filtered signal.

    Transmitter circuit, communication unit and method for amplifying a complex quadrature signal
    26.
    发明授权
    Transmitter circuit, communication unit and method for amplifying a complex quadrature signal 有权
    发射机电路，通信单元和放大复数正交信号的方法

    公开(公告)号：US09450798B2

    公开(公告)日：2016-09-20

    申请号：US14923428

    申请日：2015-10-26

    Applicant: MEDIATEK INC.

    Inventor： Khurram Muhammad ,  Chih-Ming Hung

    IPC: H04L25/49 ,  H04L27/26 ,  H04B1/04

    CPC classification number: H04L27/2623 ,  H03F3/24 ,  H04B1/0475 ,  H04B2001/0408 ,  H04B2001/0491 ,  H04L27/365

    Abstract: A transmitter circuit includes a frequency generation circuit configured to generate a local oscillator signal and a digital modulator configured to: receive data to be transmitted; quadrature modulate the received data to at least a first, Q, modulated value and a second, I, modulated value; examine the quadrature modulated data to determine if the first, Q, modulated value exceeds a limit, and in response thereto selectively modify the quadrature modulated values to a first modified, Q′, modulated value and a second modified, I′, modulated value thereby bringing only a value of the first modified, Q′, modulated value to within the limit. A local oscillator phase is selected in order to map the first modified, Q′, modulated value and second modified, I′, modulated value to desired quadrature values. A digital power amplifier, DPA, coupled to the digital quadrature modulator, is configured to amplify the quadrature modified modulated data.

    Abstract translation: 发射机电路包括：频率产生电路，被配置为产生本地振荡器信号;以及数字调制器，被配置为：接收待传输的数据; 将接收的数据正交调制为至少第一调制值和第二调制值; 检查正交调制数据以确定第一Q调制值是否超过限制，并且响应于此，将正交调制值有选择地将正交调制值修改为第一修改后的调制值，调制值和第二修正I'调制值 仅将第一个修改后的Q'调制值的值设置在限制内。 选择本地振荡器相位以便将第一修改的Q'调制值和第二修改的I'调制值映射到期望的正交值。 耦合到数字正交调制器的数字功率放大器DPA被配置为放大正交修改的调制数据。

    Sensor System Interconnect For Automatic Configuration
    30.
    发明申请
    Sensor System Interconnect For Automatic Configuration 审中-公开

    公开(公告)号：US20190257676A1

    公开(公告)日：2019-08-22

    申请号：US16280018

    申请日：2019-02-19

    Applicant: MediaTek Inc.

    Inventor： Chih-Ming Hung ,  ChiaYu Lin

    IPC: G01D18/00

    Abstract: Various examples pertaining to a sensor system interconnect for automatic configuration of sensors of the sensor system are described. A sensor senses at least one parameter. The sensor also determines its respective position among a series of sensors. Based on a result of the determining, the sensor performing either a first procedure, responsive to the sensor being a first sensor in the series of sensors, or a second procedure, responsive to the sensor not being the first sensor in the series of sensors. The first procedure involves the sensor transmitting first data of the sensed at least one parameter via a second input/output (I/O) pin of the sensor. The second procedure involves the sensor receiving second data from a preceding sensor in the series of sensors via a first I/O pin of the sensor and transmitting the first data and the second data via the second I/O pin.

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