公开(公告)号：US12248697B2

公开(公告)日：2025-03-11

申请号：US17830802

申请日：2022-06-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Yu-Chung Lien ,  Li-Te Chang ,  Zhenming Zhou

IPC: G06F3/06

Abstract: A first page read on the first memory page utilizing a first trim value is performed responsive to initiating a memory page scan on a first memory page of a plurality of memory pages. Whether a first data state metric associated with the first page read satisfies a first threshold criterion is determined. A second page read on the first memory page utilizing a second trim value is performed responsive to determining that the first data state metric satisfies the first threshold criterion. Whether a second data state metric associated with the second page read satisfies a second threshold criterion is determined. The second trim value to perform subsequent page reads during memory page scans is selected responsive to determining that the second data state metric does not satisfy the first threshold criterion.

公开(公告)号：US12051471B2

公开(公告)日：2024-07-30

申请号：US17871689

申请日：2022-07-22

Applicant: Micron Technology, Inc.

Inventor： Zhenming Zhou ,  Murong Lang ,  Li-Te Chang

IPC: G11C16/34 ,  G11C11/406

CPC classification number: G11C16/3418 ,  G11C11/40618 ,  G11C16/349

Abstract: An example system can include a memory device and a processing device. The memory device can include a group of memory cells. The processing device can be coupled to the memory device. The processing device can be configured to determine a distance of a memory die from a center of a memory component. The processing device can be configured to perform a read disturb operation on the memory die based on the determined distance use a first voltage window for a set of memory cells of the group of memory cells during a first time period.

公开(公告)号：US12013792B2

公开(公告)日：2024-06-18

申请号：US17842278

申请日：2022-06-16

Applicant: Micron Technology, Inc.

Inventor： Li-Te Chang ,  Murong Lang ,  Zhenming Zhou

IPC: G06F12/10 ,  G06F12/06 ,  G06F12/1027 ,  G11C16/10 ,  G11C16/26 ,  G11C16/34 ,  G11C16/04

CPC classification number: G06F12/1027 ,  G06F12/0692 ,  G11C16/10 ,  G11C16/26 ,  G11C16/349 ,  G06F2212/68 ,  G11C16/0483

Abstract: A read command is received by a processing device coupled to a memory device. The read command specified a logical address. The processing device translates the logical address into a physical address of a physical block of the memory device, wherein the physical address specifies a wordline and a memory device die. Responsive to determining that the physical block is partially programmed, the processing device identifies a threshold voltage offset associated with the wordline. The processing device computes a modified threshold voltage by applying the threshold voltage offset to a read level associated with the memory device die. The processing device reads the data from the physical block using the modified threshold voltage.

公开(公告)号：US20240177795A1

公开(公告)日：2024-05-30

申请号：US18519248

申请日：2023-11-27

Applicant: Micron Technology, Inc.

Inventor： Li-Te Chang ,  Aaron Lee ,  Zhenming Zhou ,  Murong Lang

IPC: G11C29/52 ,  G11C16/08 ,  G11C16/28 ,  G11C16/34

CPC classification number: G11C29/52 ,  G11C16/08 ,  G11C16/28 ,  G11C16/3404

Abstract: A system includes a memory device with multiple cells and a processing device to perform operations including: identifying a group of wordlines, each connected to a subset of cells, and assigning a specified charge loss classification value to that group. The operations can also include selecting a page level, selecting a first set of cells, determining, for the first set of cells, a value of a first data state metric, identifying a second set of cells charged to a specified charge state, and determining a value of a second data state metric. The operations can also include maintaining a skew counter of the second data state metric, identifying and updating a read reference voltage offset, as well as applying the updated read reference voltage offset in a read operation.

公开(公告)号：US20230393991A1

公开(公告)日：2023-12-07

申请号：US17842278

申请日：2022-06-16

Applicant: Micron Technology, Inc.

Inventor： Li-Te Chang ,  Murong Lang ,  Zhenming Zhou

IPC: G06F12/1027 ,  G06F12/06 ,  G11C16/26 ,  G11C16/34 ,  G11C16/10

CPC classification number: G06F12/1027 ,  G06F12/0692 ,  G11C16/26 ,  G11C16/349 ,  G11C16/10 ,  G06F2212/68 ,  G11C16/0483

Abstract: A read command is received by a processing device coupled to a memory device. The read command specified a logical address. The processing device translates the logical address into a physical address of a physical block of the memory device, wherein the physical address specifies a wordline and a memory device die. Responsive to determining that the physical block is partially programmed, the processing device identifies a threshold voltage offset associated with the wordline. The processing device computes a modified threshold voltage by applying the threshold voltage offset to a read level associated with the memory device die. The processing device reads the data from the physical block using the modified threshold voltage.

公开(公告)号：US11721381B2

公开(公告)日：2023-08-08

申请号：US17393020

申请日：2021-08-03

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Li-Te Chang ,  Murong Lang ,  Zhongguang Xu ,  Zhenming Zhou

IPC: G11C11/406 ,  G11C11/4096 ,  G11C11/4074

CPC classification number: G11C11/40611 ,  G11C11/4074 ,  G11C11/4096 ,  G11C11/40622 ,  G11C11/40626

Abstract: A processing device of a memory sub-system is configured to determine a current refresh frequency associated with the memory device, the current refresh frequency specifying a rate of performing refresh operations on data stored at the memory device; compute an updated refresh frequency by updating the current refresh frequency based on a criterion reflecting a result of comparing one or more operating parameters of the memory device to their respective threshold values; and perform a refresh operation on data stored at the memory device according to the updated refresh frequency.