公开(公告)号：US20150171321A1

公开(公告)日：2015-06-18

申请号：US14106535

申请日：2013-12-13

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Tsz Wah Chan ,  Yongjun J. Hu ,  Swapnil Lengade

IPC: H01L45/00

CPC classification number: H01L27/2481 ,  H01L23/528 ,  H01L23/53257 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/16

Abstract: The disclosed technology relates to integrate circuits, including memory devices. A method of forming an integrated circuit comprises providing a surface comprising a first region and a second region, wherein the first region is formed of a different material than the second region. The method additionally comprises forming a seeding material in contact with and across the first and second regions. The method further comprises forming a metal comprising tungsten on the seeding material.

Abstract translation: 所公开的技术涉及集成电路，包括存储器件。 形成集成电路的方法包括提供包括第一区域和第二区域的表面，其中第一区域由与第二区域不同的材料形成。 该方法还包括形成与第一和第二区域接触并穿过第一和第二区域的播种材料。 该方法还包括在接种材料上形成包含钨的金属。

公开(公告)号：US20250089233A1

公开(公告)日：2025-03-13

申请号：US18784176

申请日：2024-07-25

Applicant: Micron Technology, Inc.

Inventor： Yongjun J. Hu

IPC: H10B12/00

Abstract: Systems, methods and apparatus are provided for nitride lattice support structures and double side capacitors in vertical three-dimensional (3D) memory. An example method includes a method for forming a nitride lattice support structures for an array of vertically stacked memory cells having access devices and storage nodes. The method includes depositing alternating layers of a channel material and a first sacrificial material in repeating iterations to form a vertical stack on a substrate. The vertical stack can be patterned to form a plurality of elongated vertical columns separated by a plurality of first vertical opening. A second sacrificial material can be deposited to fill the first vertical openings and cover the vertical stack. A plurality of vertical openings and lateral recesses can be formed. A nitride material can be deposited in the vertical openings and lateral recesses to form a plurality of nitride lattice support structures.

公开(公告)号：US12171101B2

公开(公告)日：2024-12-17

申请号：US17822708

申请日：2022-08-26

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Matthew J. King ,  Jordan D. Greenlee ,  Yongjun J. Hu ,  Tom George ,  Amritesh Rai ,  Sidhartha Gupta ,  Kyle A. Ritter

IPC: H10B41/30 ,  H01L21/28 ,  H01L29/49 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27 ,  H10B43/30 ,  H10B43/40

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US11527546B2

公开(公告)日：2022-12-13

申请号：US16943826

申请日：2020-07-30

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Matthew J. King ,  Jordan D. Greenlee ,  Yongjun J. Hu ,  Tom George ,  Amritesh Rai ,  Sidhartha Gupta ,  Kyle A. Ritter

IPC: H01L27/11556 ,  H01L27/11573 ,  H01L27/11582 ,  H01L21/28 ,  H01L29/49 ,  H01L27/11529

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20220359822A1

公开(公告)日：2022-11-10

申请号：US17315114

申请日：2021-05-07

Applicant: Micron Technology, Inc.

Inventor： Pengyuan Zheng ,  Yongjun J. Hu

IPC: H01L45/00

Abstract: Memory devices having electrode structures that increase in resistivity with thermal cycling, and associated systems and methods, are disclosed herein. In some embodiments, a memory device includes a memory element and an electrode structure electrically coupled to the memory element. The electrode structure can include a material comprising a composition of tungsten, silicon, and germanium.

公开(公告)号：US20220037350A1

公开(公告)日：2022-02-03

申请号：US16943826

申请日：2020-07-30

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Matthew J. King ,  Jordan D. Greenlee ,  Yongjun J. Hu ,  Tom George ,  Amritesh Rai ,  Sidhartha Gupta ,  Kyle A. Ritter

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/11529 ,  H01L29/49 ,  H01L21/28

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US11127745B2

公开(公告)日：2021-09-21

申请号：US16906718

申请日：2020-06-19

Applicant: Micron Technology, Inc.

Inventor： Kentaro Ishii ,  Yongjun J. Hu ,  Amirhasan Nourbakhsh ,  Durai Vishak Nirmal Ramaswamy ,  Christopher W. Petz ,  Luca Fumagalli

IPC: H01L27/108

Abstract: A method of forming an apparatus comprises forming a first metal nitride material over an upper surface of a conductive material within an opening extending through at least one dielectric material through a non-conformal deposition process. A second metal nitride material is formed over an upper surface of the first metal nitride material and side surfaces of the at least one dielectric material partially defining boundaries of the opening through a conformal deposition process. A conductive structure is formed over surfaces of the second metal nitride material within the opening. Apparatuses and electronic systems are also described.

公开(公告)号：US20210005455A1

公开(公告)日：2021-01-07

申请号：US16459079

申请日：2019-07-01

Applicant: Micron Technology, Inc.

Inventor： Yiping Wang ,  Caizhi Xu ,  Pengyuan Zheng ,  Ying Rui ,  Russell A. Benson ,  Yongjun J. Hu ,  Jaydeb Goswami

IPC: H01L21/033 ,  H01L21/308 ,  H01L27/108

Abstract: Systems, apparatuses, and methods related to atom implantation for reduction of compressive stress are described. An example method may include patterning a working surface of a semiconductor, the working surface having a hard mask material formed over a dielectric material and forming a material having a lower refractive index (RI), relative to a RI of the hard mask material, over the hard mask material. The method may further include implanting atoms through the lower RI material and into the hard mask material to reduce the compressive stress in the hard mask material.

公开(公告)号：US20190378975A1

公开(公告)日：2019-12-12

申请号：US16001795

申请日：2018-06-06

Applicant: Micron Technology, Inc.

Inventor： Pengyuan Zheng ,  Yongjun J. Hu ,  Yao Jin ,  Hongqi Li ,  Andrea Gotti

IPC: H01L45/00 ,  H01L27/24

Abstract: Methods, systems, and devices for fabrication of memory cells are described. An electrode layer may have an initial thickness variation after being formed. The electrode layer may be smoothened prior to forming additional layers of a memory cell, thus decreasing the thickness variation. The subsequent layer fabricated may have a thickness variation that may be dependent on the thickness variation of the electrode layer. By decreasing the thickness variation of the electrode layer prior to forming the subsequent layer, the subsequent layer may also have a decreased thickness variation. The decreased thickness variation of the subsequent layer may impact the electrical behavior of memory cells formed from the subsequent layer. In some cases, the decreased thickness variation of the subsequent layer may allow for more predictable voltage thresholds for such memory cells, thus increasing the read windows for the memory cells.

公开(公告)号：US20150123188A1

公开(公告)日：2015-05-07

申请号：US14069553

申请日：2013-11-01

Applicant: Micron Technology, Inc.

Inventor： Zhenyu Lu ,  Roger W. Lindsay ,  Andrew Bicksler ,  Yongjun J. Hu ,  Haitao Liu

IPC: H01L27/115

CPC classification number: H01L27/11556 ,  H01L23/5283 ,  H01L27/11524 ,  H01L29/456 ,  H01L29/66825 ,  H01L29/7926

Abstract: Methods for forming a string of memory cells, an apparatus having a string of memory cells, and a system are disclosed. A method for forming the string of memory cells comprises forming a metal silicide source material over a substrate. The metal silicide source material is doped. A vertical string of memory cells is formed over the metal silicide source material. A semiconductor material is formed vertically and adjacent to the vertical string of memory cells and coupled to the metal silicide source material.

Abstract translation: 公开了形成一串存储器单元的方法，具有一串存储单元的装置和系统。 一种用于形成存储单元串的方法包括在衬底上形成金属硅化物源材料。 掺杂金属硅化物源材料。 在金属硅化物源材料上形成垂直的存储单元串。 半导体材料垂直地形成并且与垂直的存储单元串相邻并且耦合到金属硅化物源材料。