Method for programming memory device and associated memory device
    23.
    发明授权
    Method for programming memory device and associated memory device 有权
    用于编程存储器件和相关存储器件的方法

    公开(公告)号:US09478288B1

    公开(公告)日:2016-10-25

    申请号:US14687998

    申请日:2015-04-16

    Abstract: A method for programming a memory device comprises the following steps: performing an interleaving programming, including: programming a first memory cell during a first time interval and correspondingly verifying the first memory cell during a second time interval; programming a second memory cell during a third time interval and correspondingly verifying the second memory cell during a fourth time interval between the first and second time intervals; and inserting at least one dummy cycle between the first and second time intervals to ensure that a resistance change per unit of time of the first memory cell is less than a threshold.

    Abstract translation: 一种用于编程存储器件的方法包括以下步骤:执行交织编程,包括:在第一时间间隔期间对第一存储器单元进行编程,并在第二时间间隔内相应地验证第一存储器单元; 在第三时间间隔期间编程第二存储器单元,并在第一和第二时间间隔之间的第四时间间隔期间相应地验证第二存储器单元; 以及在所述第一和第二时间间隔之间插入至少一个虚拟周期,以确保所述第一存储单元的每单位时间的电阻变化小于阈值。

    METHOD FOR PROGRAMMING MEMORY DEVICE AND ASSOCIATED MEMORY DEVICE
    24.
    发明申请
    METHOD FOR PROGRAMMING MEMORY DEVICE AND ASSOCIATED MEMORY DEVICE 有权
    编程存储器件和相关存储器件的方法

    公开(公告)号:US20160307627A1

    公开(公告)日:2016-10-20

    申请号:US14687998

    申请日:2015-04-16

    Abstract: A method for programming a memory device comprises the following steps: performing an interleaving programming, including: programming a first memory cell during a first time interval and correspondingly verifying the first memory cell during a second time interval; programming a second memory cell during a third time interval and correspondingly verifying the second memory cell during a fourth time interval between the first and second time intervals; and inserting at least one dummy cycle between the first and second time intervals to ensure that a resistance change per unit of time of the first memory cell is less than a threshold.

    Abstract translation: 一种用于编程存储器件的方法包括以下步骤:执行交织编程,包括:在第一时间间隔期间对第一存储器单元进行编程,并在第二时间间隔内相应地验证第一存储器单元; 在第三时间间隔期间编程第二存储器单元,并在第一和第二时间间隔之间的第四时间间隔期间相应地验证第二存储器单元; 以及在所述第一和第二时间间隔之间插入至少一个虚拟周期,以确保所述第一存储单元的每单位时间的电阻变化小于阈值。

    WRITING METHOD AND READING METHOD OF PHASE CHANGE MEMORY
    25.
    发明申请
    WRITING METHOD AND READING METHOD OF PHASE CHANGE MEMORY 审中-公开
    相变记忆的写入方法和读取方法

    公开(公告)号:US20160225445A1

    公开(公告)日:2016-08-04

    申请号:US14609595

    申请日:2015-01-30

    CPC classification number: G11C13/0069 G11C13/0004 G11C13/004 G11C2013/0083

    Abstract: A writing method and a reading method of a phase change memory (PCM) are provided. The PCM has a plurality of memory cells. The writing method comprises the following steps. At least one stress pulse is applied for aging at least one of the memory cells. A starting pulse is applied to all of the memory cells of the PCM for increasing a resistance of each of the memory cells. A detection pulse is applied to all of the memory cells of the PCM for decreasing the resistance of each of the memory cells and detecting the resistance changing speed of each of the memory cells. A set pulse is applied to the aged memory cells. A reset pulse is applied to the non-aged memory cells.

    Abstract translation: 提供了相变存储器(PCM)的写入方法和读取方法。 PCM具有多个存储单元。 写入方法包括以下步骤。 施加至少一个应力脉冲来老化至少一个存储器单元。 将起始脉冲施加到PCM的所有存储单元,以增加每个存储单元的电阻。 检测脉冲被施加到PCM的所有存储单元,用于减小每个存储单元的电阻并检测每个存储单元的电阻变化速度。 对老化的记忆单元施加设定脉冲。 复位脉冲施加到非老化的存储单元。

    MEMORY OPERATING METHOD AND ASSOCIATED MEMORY DEVICE
    26.
    发明申请
    MEMORY OPERATING METHOD AND ASSOCIATED MEMORY DEVICE 有权
    存储器操作方法和相关存储器件

    公开(公告)号:US20160217852A1

    公开(公告)日:2016-07-28

    申请号:US14711867

    申请日:2015-05-14

    Inventor: Chao-I Wu

    Abstract: A memory operating method comprises the following steps: a first read voltage is applied to the memory cell to read a first group of data levels of the memory cell; and if the data of the memory cell can not be read with the first read voltage, a second read voltage is applied to the memory cell to read a second group of data levels of the memory cell.

    Abstract translation: 存储器操作方法包括以下步骤:将第一读取电压施加到存储器单元以读取存储器单元的第一组数据电平; 并且如果不能用第一读取电压读取存储器单元的数据,则向存储器单元施加第二读取电压以读取存储器单元的第二组数据电平。

    Resistance drift recovery method for MLC PCM
    30.
    发明授权
    Resistance drift recovery method for MLC PCM 有权
    MLC PCM电阻漂移恢复方法

    公开(公告)号:US09558823B1

    公开(公告)日:2017-01-31

    申请号:US14846393

    申请日:2015-09-04

    Abstract: A method is provided for operating a memory device including an array of memory cells including programmable resistive memory elements. Memory cells in the array are programmed to store data by applying program pulses to the memory cells to establish resistance levels within a number N of specified ranges of resistance, where each of the specified ranges corresponds to a particular data value. A drift recovery process is executed to the memory cells, including applying a recovery pulse having a pulse shape to a set of programmed memory cells, where memory cells in the set have resistance levels within two or more of the specified resistance ranges.

    Abstract translation: 提供一种用于操作包括包括可编程电阻存储器元件的存储单元阵列的存储器件的方法。 阵列中的存储单元被编程为通过向存储器单元施加编程脉冲来存储数据,以建立指定范围电阻数量N内的电阻电平,其中每个指定范围对应于特定数据值。 对存储器单元执行漂移恢复处理,包括将具有脉冲形状的恢复脉冲施加到一组编程存储器单元,其中该组中的存储单元具有在指定电阻范围内的两个或更多个内的电阻电平。

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