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63 条记录 (耗时 0.025 秒)

    Navigation apparatus
    24.
    发明授权
    Navigation apparatus 有权
    导航仪

    公开(公告)号：US07522997B2

    公开(公告)日：2009-04-21

    申请号：US11735601

    申请日：2007-04-16

    申请人： Akinori Asahara ,  Shigeru Shimada ,  Kishiko Maruyama

    发明人： Akinori Asahara ,  Shigeru Shimada ,  Kishiko Maruyama

    IPC分类号： G01C21/00

    CPC分类号： G01C21/3453 ,  G01C21/3415

    摘要： A controller of a navigation terminal (navigation apparatus) is configured to find a plurality of paths from a current position of a vehicle and a destination based on a plurality of different and prioritized path-finding conditions, respectively, and causes a display to show the plurality of paths which includes a navigating path found on the basis of a top-priority path-finding condition and at least one alternative path found on the other path-finding condition(s). In response to detection of deviation of the vehicle, the priority assigned to a path-finding condition based on which a specific alternative path along which the vehicle is running is changed into a top priority, and path-finding operation is performed again for paths from the current position of the vehicle to the destination to show a new navigating path and at least one new alternative path in the display.

    摘要翻译： 导航终端（导航装置）的控制器被配置为分别基于多个不同的优先路径寻找条件从车辆和目的地的当前位置找到多条路径，并使显示器显示 多个路径，其包括基于最优先路径查找条件找到的导航路径和在另一路径查找条件上找到的至少一个替代路径。 响应于车辆的偏差的检测，分配给路径寻找条件的优先级基于哪个车辆正在运行的特定替代路径被改变为最高优先级，并且再次执行路径寻找操作，用于从 车辆到目的地的当前位置，以显示新的导航路径和至少一个新的替代路径在显示器中。

    Microprocessor including a microprogram ROM having a dynamic level detecting means for detecting a level of a word line
    25.
    发明授权
    Microprocessor including a microprogram ROM having a dynamic level detecting means for detecting a level of a word line 失效
    微处理器包括具有用于检测字线电平的动态电平检测装置的微程序ROM

    公开(公告)号：US4896300A

    公开(公告)日：1990-01-23

    申请号：US126258

    申请日：1987-11-25

    申请人： Yutaka Shinagawa ,  Shigeru Shimada

    发明人： Yutaka Shinagawa ,  Shigeru Shimada

    IPC分类号： G11C17/12 ,  G11C8/08 ,  G11C11/407 ,  G11C17/18

    CPC分类号： G11C8/08

    摘要： A semiconductor memory includes a word line driving circuit whose output terminal is coupled to one end of each word line of a memory array, and also an auxiliary driving circuit which drives the other end of the word line upon receiving a selection signal transmitted to the other end of this word line. The auxiliary driving circuit comprises a level detector circuit which is dynamically driven by a timing signal, and a driving element which is driven by an output of the level detector circuit to drive the other end of the word line. When the word line is to be reset, the output of the level detector circuit is set at a level which brings the driving element into an "off" state. The auxiliary driving circuit of this arrangement permits the other end of the word line to change to a selection level quickly and to be reset quickly.

    Semiconductor memory having a dynamic level detecting means for detecting a level of a word line
    26.
    发明授权
    Semiconductor memory having a dynamic level detecting means for detecting a level of a word line 失效
    具有动态电平检测装置的半导体存储器，用于检测字线的电平

    公开(公告)号：US4719603A

    公开(公告)日：1988-01-12

    申请号：US852316

    申请日：1986-04-15

    申请人： Yutaka Shinagawa ,  Shigeru Shimada

    发明人： Yutaka Shinagawa ,  Shigeru Shimada

    IPC分类号： G11C17/12 ,  G11C8/08 ,  G11C11/407 ,  G11C17/18 ,  G11C7/00 ,  G11C11/24

    CPC分类号： G11C8/08

    摘要： A semiconductor memory includes a word line driving circuit whose output terminal is coupled to one end of each word line of a memory array, and also an auxiliary driving circuit which drives the other end of the word line upon receiving a selection signal transmitted to the other end of this word line. The auxiliary driving circuit comprises a level detector circuit which is dynamically driven by a timing signal, and a driving element which is driven by an output of the level detector circuit to drive the other end of the word line. When the word line is to be reset, the output of the level detector circuit is set at a level which brings the driving element into an "off" state. The auxiliary driving circuit of this arrangement permits the other end of the word line to change to a selection level quickly and to be reset quickly.

    摘要翻译： 半导体存储器包括字线驱动电路，其输出端耦合到存储器阵列的每个字线的一端，以及辅助驱动电路，其在接收到发送到另一个的选择信号时驱动字线的另一端 这个字线的结尾。 辅助驱动电路包括由定时信号动态驱动的电平检测器电路和由电平检测器电路的输出驱动以驱动字线另一端的驱动元件。 当字线被复位时，电平检测器电路的输出被设置在使驱动元件处于“关闭”状态的水平。 这种布置的辅助驱动电路允许字线的另一端快速地改变到选择电平并被快速复位。

    Magnetic recording medium
    27.
    发明授权
    Magnetic recording medium 失效
    磁记录介质

    公开(公告)号：US4678708A

    公开(公告)日：1987-07-07

    申请号：US807825

    申请日：1985-12-11

    申请人： Shigeru Shimada ,  Masaharu Nishimatsu ,  Hiroyuki Arioka ,  Yuichi Kubota

    发明人： Shigeru Shimada ,  Masaharu Nishimatsu ,  Hiroyuki Arioka ,  Yuichi Kubota

    IPC分类号： C09D5/23 ,  C09D127/04 ,  C09D127/06 ,  C09D175/04 ,  C09D175/14 ,  G11B5/702

    CPC分类号： G11B5/7023 ,  Y10S428/90 ,  Y10T428/265 ,  Y10T428/31786 ,  Y10T428/31797 ,  Y10T428/31935

    摘要： A magnetic recording medium, obtained by preparing a radiation-sensitive curing resin by modification of a copolymer of (A) vinyl chloride, (B) a vinyl carboxylate, (C) an unsaturated carboxylic acid and (D) an unsaturated carboxylic anhydride, containing 50 to 80% by weight of (A) based on the total of (A) and (B), 10 to 30% by weight of (D) based on the total of (C) and (D) and a total of 1 to 5 parts by weight of (C) and (D) based on 100 parts by weight of (A) and (B) and having an average polymerization degree of 100 of 400, and a magnetic powder thereby producing a magnetic paint, applying said magnetic paint to a non-magnetic substrate, and solidifying the resultant coating of paint on said substrate by exposure to radiation.

    摘要翻译： 通过改变（A）氯乙烯，（B）乙烯基羧酸酯，（C）不饱和羧酸和（D）不饱和羧酸酐的共聚物制备辐射敏感固化树脂得到的磁记录介质，其包含 基于（A）和（B）的总和（A）为50〜80重量％，（C）和（D）总计为10〜30重量％（D），总计1 相对于100重量份的（A）和（B），平均聚合度为100的400重量份的（C）和（D）的5重量份，和由此制成磁性涂料的磁性粉末， 将磁性涂料涂覆到非磁性基材上，并通过暴露于辐射使所得基材上的涂料固化。

    On-vehicle map display apparatus, map display method
    29.
    发明授权
    On-vehicle map display apparatus, map display method 有权
    车载地图显示装置，地图显示方式

    公开(公告)号：US08224570B2

    公开(公告)日：2012-07-17

    申请号：US12105720

    申请日：2008-04-18

    申请人： Akio Sumizawa ,  Akihiro Kaneko ,  Shigeru Shimada ,  Kishiko Maruyama ,  Akinori Asahara

    发明人： Akio Sumizawa ,  Akihiro Kaneko ,  Shigeru Shimada ,  Kishiko Maruyama ,  Akinori Asahara

    IPC分类号： G01C21/00 ,  G01C21/34 ,  G08G1/123

    CPC分类号： G01C21/367 ,  G01C21/3694 ,  G08G1/096716 ,  G08G1/09675 ,  G08G1/096775

    摘要： This on-vehicle map display apparatus comprises a map scale setting unit that sets a map scale, a summary map generation unit that generates a summary map by abbreviating road shapes if a map scale that is less than a predetermined scale is set by the map scale setting unit, a summary map display control unit that displays the summary map generated by the summary map generation unit upon a display monitor, a congestion information acquisition unit that acquires congestion information, and a congestion information display control unit that displays the congestion information acquired by the congestion information acquisition unit as superimposed upon the summary map displayed upon the display monitor by the summary map display control unit.

    摘要翻译： 该车载地图显示装置包括：地图比例设定单元，其设定地图比例;概要地图生成单元，其通过地图比例设定小于预定比例的地图比例时，通过缩写道路形状来生成概要地图 总结地图显示控制单元，其在显示监视器上显示由总结图生成单元生成的概要图，拥挤信息获取单元，其获取拥挤信息;拥堵信息显示控制单元，显示由 所述拥堵信息获取单元叠加在由所述概要地图显示控制单元显示在所述显示监视器上的所述总结图上。

    Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device
    30.
    发明授权
    Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device 失效

    公开(公告)号：US07541647B2

    公开(公告)日：2009-06-02

    申请号：US11167648

    申请日：2005-06-28

    申请人： Ryuji Shibata ,  Shigeru Shimada

    发明人： Ryuji Shibata ,  Shigeru Shimada

    IPC分类号： H01L23/62

    CPC分类号： H01L27/11807 ,  H01L27/0207 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In a semiconductor integrated circuit device and a method of designing the same, design information about circuit cells each having a desired function are described as objects according to selected purposes. The pieces of design information are registered in a cell library as cell information capable of forming any of substrate potential fixed cells and substrate potential variable cells. Further, a data sheet common to the substrate potential fixed cell and the substrate potential variable cell is offered to a user, so that the user is able to make a selection according to the user's purposes. The substrate potential fixed cells and the substrate potential variable cells are mixed together on a semiconductor chip so as to be properly used according to the functions or the like of circuit portions in which the cells are used.