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公开(公告)号：US20180047896A1
公开(公告)日：2018-02-15
申请号：US15792842
申请日：2017-10-25
IPC分类号： H01L45/00 , H01L21/3213 , H01L27/22 , H01L27/105 , H01L21/28 , H01L27/24
CPC分类号： H01L45/124 , H01L21/28 , H01L21/3213 , H01L27/1052 , H01L27/222 , H01L27/2427 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/144 , H01L45/146 , H01L45/16 , H01L45/1675
摘要： Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
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公开(公告)号：US09806129B2
公开(公告)日：2017-10-31
申请号：US14189490
申请日：2014-02-25
发明人： Marcello Ravasio , Samuele Sciarrillo , Fabio Pellizzer , Innocenzo Tortorelli , Roberto Somaschini , Cristina Casellato , Riccardo Mottadelli
CPC分类号： H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material. The method of fabricating cross-point arrays further comprises patterning the memory cell material stack, which includes etching through at least one of the first and second active materials of the memory cell material stack, forming protective liners on sidewalls of the at least one of the first and second active materials after etching through the one of the first and second active materials, and further etching the memory cell material stack after forming the protective liners on the sidewalls of the one of the first and second active materials.
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公开(公告)号：US20160104837A1
公开(公告)日：2016-04-14
申请号：US14972152
申请日：2015-12-17
CPC分类号： H01L45/124 , H01L21/28 , H01L21/3213 , H01L27/1052 , H01L27/222 , H01L27/2427 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/144 , H01L45/146 , H01L45/16 , H01L45/1675
摘要： Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
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公开(公告)号：US10854674B2
公开(公告)日：2020-12-01
申请号：US15693102
申请日：2017-08-31
发明人： Marcello Ravasio , Samuele Sciarrillo , Fabio Pellizzer , Innocenzo Tortorelli , Roberto Somaschini , Cristina Casellato , Riccardo Mottadelli
摘要： The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material. The method of fabricating cross-point arrays further comprises patterning the memory cell material stack, which includes etching through at least one of the first and second active materials of the memory cell material stack, forming protective liners on sidewalls of the at least one of the first and second active materials after etching through the one of the first and second active materials, and further etching the memory cell material stack after forming the protective liners on the sidewalls of the one of the first and second active materials.
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公开(公告)号：US10777743B2
公开(公告)日：2020-09-15
申请号：US15792842
申请日：2017-10-25
IPC分类号： H01L45/00 , H01L27/105 , H01L21/28 , H01L27/24 , H01L27/22 , H01L21/3213
摘要： Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
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公开(公告)号：US20190355789A1
公开(公告)日：2019-11-21
申请号：US16420483
申请日：2019-05-23
摘要： A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.
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公开(公告)号：US20170365642A1
公开(公告)日：2017-12-21
申请号：US15693102
申请日：2017-08-31
发明人： Marcello Ravasio , Samuele Sciarrillo , Fabio Pellizzer , Innocenzo Tortorelli , Roberto Somaschini , Cristina Casellato , Riccardo Mottadelli
CPC分类号： H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material. The method of fabricating cross-point arrays further comprises patterning the memory cell material stack, which includes etching through at least one of the first and second active materials of the memory cell material stack, forming protective liners on sidewalls of the at least one of the first and second active materials after etching through the one of the first and second active materials, and further etching the memory cell material stack after forming the protective liners on the sidewalls of the one of the first and second active materials.
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公开(公告)号：US20160020256A1
公开(公告)日：2016-01-21
申请号：US14867185
申请日：2015-09-28
CPC分类号： H01L27/2427 , H01L27/224 , H01L27/226 , H01L27/228 , H01L27/2409 , H01L27/2436 , H01L27/2445 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/065 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/141 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
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公开(公告)号：US20150137061A1
公开(公告)日：2015-05-21
申请号：US14086460
申请日：2013-11-21
CPC分类号： H01L27/2463 , H01L27/2427 , H01L27/2445 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.
摘要翻译： 公开了一种制造存储器件的方法。 一方面，该方法包括对沿第一方向延伸的第一导电线图案化。 该方法还包括在对第一导线图案化之后，在第一导电线上形成存储单元堆叠的独立柱。 形成独立的支柱包括在导电线上沉积包括选择材料和储存材料的存储单元堆叠，并且使存储单元堆叠构图以形成独立柱。 该方法还包括在图案化存储单元堆叠之后在柱上图形化第二导线，第二导线沿与第一方向交叉的第二方向延伸。
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公开(公告)号：US20150028280A1
公开(公告)日：2015-01-29
申请号：US13952357
申请日：2013-07-26
IPC分类号： H01L45/00
摘要： Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
摘要翻译： 提供了存储单元结构及其形成方法。 示例性存储单元可以包括开关元件和与开关元件串联形成的存储元件。 开关元件的最小横向尺寸不同于存储元件的最小横向尺寸。
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