公开(公告)号：US11238939B2

公开(公告)日：2022-02-01

申请号：US17158555

申请日：2021-01-26

Applicant: Micron Technology, Inc.

Inventor： Ting Luo ,  Kulachet Tanpairoj ,  Harish Reddy Singidi ,  Jianmin Huang ,  Preston Allen Thomson ,  Sebastien Andre Jean

IPC: G11C11/34 ,  G11C16/16 ,  G11C16/04 ,  G11C16/08 ,  G11C11/56 ,  G11C16/34 ,  H01L27/11582 ,  H01L27/11556

Abstract: Disclosed in some examples are systems, methods, memory devices, and machine readable mediums for a fast secure data destruction for NAND memory devices that renders data in a memory cell unreadable. Instead of going through all the erase phases, the memory device may remove sensitive data by performing only the pre-programming phase of the erase process. Thus, the NAND doesn't perform the second and third phases of the erase process. This is much faster and results in data that cannot be reconstructed. In some examples, because the erase pulse is not actually applied and because this is simply a programming operation, data may be rendered unreadable at a per-page level rather than a per-block level as in traditional erases.

公开(公告)号：US11061612B2

公开(公告)日：2021-07-13

申请号：US16417029

申请日：2019-05-20

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G06F3/06 ,  G06F13/16 ,  G11C16/04 ,  H03M7/30

Abstract: Apparatus and methods are disclosed, including enabling communication between a memory controller and multiple memory devices of a storage system using a storage-system interface, the multiple memory devices each comprising a device controller and a group of non-volatile memory cells, and compressing data using at least one of the device controllers prior to transfer over the storage-system interface to improve an effective internal data transmission speed of the storage system.

公开(公告)号：US20210151111A1

公开(公告)日：2021-05-20

申请号：US17158555

申请日：2021-01-26

Applicant: Micron Technology, Inc.

Inventor： Ting Luo ,  Kulachet Tanpairoj ,  Harish Reddy Singidi ,  Jianmin Huang ,  Preston Allen Thomson ,  Sebastien Andre Jean

IPC: G11C16/16 ,  G11C16/04 ,  G11C16/08 ,  G11C11/56 ,  G11C16/34

Abstract: Disclosed in some examples are systems, methods, memory devices, and machine readable mediums for a fast secure data destruction for NAND memory devices that renders data in a memory cell unreadable. Instead of going through all the erase phases, the memory device may remove sensitive data by performing only the pre-programming phase of the erase process. Thus, the NAND doesn't perform the second and third phases of the erase process. This is much faster and results in data that cannot be reconstructed. In some examples, because the erase pulse is not actually applied and because this is simply a programming operation, data may be rendered unreadable at a per-page level rather than a per-block level as in traditional erases.

公开(公告)号：US10998066B2

公开(公告)日：2021-05-04

申请号：US16589956

申请日：2019-10-01

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G11C16/34 ,  G11C29/52 ,  G01R31/3193 ,  G11C29/44 ,  G11C29/56

Abstract: Disclosed in some examples are methods, systems, memory devices, machine readable mediums configured to intentionally degrade NAND performance when a value of a NAND health metric indicates a potential for failure to encourage users to replace or backup their devices before data loss occurs. For example, the system may track a NAND health metric and when that metric reaches a predetermined threshold or state, the system may intentionally degrade performance. This performance degradation may be more effective than a warning to effect device backup or replacement.

公开(公告)号：US10747441B2

公开(公告)日：2020-08-18

申请号：US15690992

申请日：2017-08-30

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G06F3/06

Abstract: Devices and techniques for efficient allocation of storage connection resources are disclosed herein. An active trigger for a storage device is received when the storage device is in an idle state. A workload that corresponds to the storage device is measured to determine that the workload meets a threshold. Connection parameters, for a connection to the storage device, are negotiated based on the workload in response to receipt of the active trigger and the workload meeting the threshold. The workload is then executed on the storage device via the connection using the connection parameters.

公开(公告)号：US10347329B2

公开(公告)日：2019-07-09

申请号：US15689989

申请日：2017-08-29

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean ,  Ting Luo

IPC: G11C11/56 ,  G11C16/34

CPC classification number: G11C11/5628 ,  G11C16/10 ,  G11C16/3418 ,  G11C16/3459 ,  G11C2211/5641

Abstract: Devices and techniques to reduce corruption of preloaded data during assembly are disclosed herein. A memory device can perform operations to store received data, including preloaded data, up to a threshold amount on a memory array in a reflow-protection mode, and to transition from the reflow-protection mode to a normal-operation mode after the initial data exceeds the threshold amount.

公开(公告)号：US10311959B2

公开(公告)日：2019-06-04

申请号：US16130663

申请日：2018-09-13

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean ,  Harish Reddy Singidi

IPC: G11C11/34 ,  G11C16/34 ,  G11C16/10 ,  G11C16/04

Abstract: Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.

公开(公告)号：US20190130984A1

公开(公告)日：2019-05-02

申请号：US15799577

申请日：2017-10-31

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G11C16/34 ,  G01R31/3193

CPC classification number: G11C16/3495 ,  G01R31/31935 ,  G11C29/52 ,  G11C2029/4402 ,  G11C2029/5606

Abstract: Disclosed in some examples are methods, systems, memory devices, machine readable mediums configured to intentionally degrade NAND performance when a value of a NAND health metric indicates a potential for failure to encourage users to replace or backup their devices before data loss occurs. For example, the system may track a NAND health metric and when that metric reaches a predetermined threshold or state, the system may intentionally degrade performance. This performance degradation may be more effective than a warning to effect device backup or replacement.

公开(公告)号：US20190130979A1

公开(公告)日：2019-05-02

申请号：US16219144

申请日：2018-12-13

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G11C16/22 ,  G11C16/04

CPC classification number: G11C16/22 ,  G11C7/04 ,  G11C16/04 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26

Abstract: Devices and techniques for increased NAND performance under high thermal conditions are disclosed herein. An indicator of a high-temperature thermal condition for a NAND device may be obtained. A workload of the NAND device may be measured in response to the high-temperature thermal condition. Operation of the NAND device may then be modified based on the workload and the high-temperature thermal condition.

公开(公告)号：US20190066810A1

公开(公告)日：2019-02-28

申请号：US16130663

申请日：2018-09-13

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean ,  Harish Reddy Singidi

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/04

Abstract: Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.