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公开(公告)号:US20100101852A1
公开(公告)日:2010-04-29
申请号:US12646517
申请日:2009-12-23
申请人: Seiji Shirai , Kenichi Shimada , Motoo Asai
发明人: Seiji Shirai , Kenichi Shimada , Motoo Asai
IPC分类号: H05K1/11
CPC分类号: H05K3/4661 , H05K3/108 , H05K3/381 , H05K3/382 , H05K3/421 , H05K3/423 , H05K2201/0129 , H05K2201/015 , H05K2201/0278 , H05K2201/09563 , H05K2201/096 , H05K2201/09745 , Y10T428/24273 , Y10T428/24322 , Y10T428/24917 , Y10T428/31681
摘要: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.
摘要翻译: 本发明提供了一种多层印刷线路板,其具有有利地用于在其上形成精细电路图案的填充通孔结构,并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层构成,层间绝缘树脂层各自形成有各自填充有镀层的孔,以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦,并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半,小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙,并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂,氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。
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公开(公告)号:US20090188708A1
公开(公告)日:2009-07-30
申请号:US12409683
申请日:2009-03-24
申请人: Honchin EN , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin EN , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: A method of manufacturing a multilayer printed circuit board including preparing a substrate board having a conductor circuit formed over the substrate board, forming an interlayer resin insulating layer on the conductor circuit formed over the substrate board by press laminating on the conductor circuit a film comprising a cycloolefin resin under vacuum or reduced pressure, and forming a via hole connecting to the conductor circuit through the resin insulating layer, the forming of the via hole including plating the via hole to fill up.
摘要翻译: 一种多层印刷电路板的制造方法,其特征在于,包括:准备在所述基板上形成有导体电路的基板,在所述导体电路上形成在所述导体电路上形成的层间树脂绝缘层, 在真空或减压下形成环烯烃树脂,并且通过树脂绝缘层形成连接到导体电路的通孔,形成通孔,其中电镀通孔以填满。
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公开(公告)号:US20090183904A1
公开(公告)日:2009-07-23
申请号:US12409670
申请日:2009-03-24
申请人: Honchin EN , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin EN , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
IPC分类号: H05K1/00
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: A multilayer printed circuit board including a substrate board and a built-up structure formed over the substrate board. The built-up structure includes conductor circuits and resin insulating layers. The built-up structure has via holes interconnecting the conductor circuits through one or more resin insulating layers. The via holes are filled up with plating, and the resin insulating layers is formed of a cycloolefin resin.
摘要翻译: 一种多层印刷电路板,包括形成在基板上的基板和叠层结构。 组合结构包括导体电路和树脂绝缘层。 积层结构具有通过一个或多个树脂绝缘层将导体电路互连的通孔。 通孔填充有电镀,树脂绝缘层由环烯烃树脂形成。
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公开(公告)号:US08533943B2
公开(公告)日:2013-09-17
申请号:US12409683
申请日:2009-03-24
申请人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: A method of manufacturing a multilayer printed circuit board includes preparing a substrate having a first conductor circuit, forming on first circuit formed over substrate a film including cycloolefin resin such that an insulating layer including the resin is formed on substrate and first circuit, forming in insulating layer an opening exposing at least portion of first circuit, forming an electroless plating film covering surface of insulating layer including surface of insulating layer inside opening, forming on electroless film a plating resist layer having pattern exposing selected portions of electroless film, selected portions of electroless film including a second conductor circuit and a portion of electroless film covering opening, and forming an electrolytic plating film covering selected portions of electroless film such that a filled via conductor including an electrolytic material filling space in opening and that first circuit is connected to second circuit via conductor.
摘要翻译: 一种制造多层印刷电路板的方法包括制备具有第一导体电路的基板,在基板上形成包括环烯烃树脂的膜的第一电路上,在基板和第一电路上形成包括树脂的绝缘层,形成绝缘体 在第一电路的至少一部分上露出开口,形成包含绝缘层内部开口的绝缘层表面的无电解镀膜覆盖表面,在无电镀膜上形成具有露出化学镀选择部分的图案的电镀抗蚀剂层, 膜,其包括第二导体电路和无电解膜覆盖开口的一部分,并且形成覆盖化学镀膜的选定部分的电解镀膜,使得包括电解质填充空间的填充通孔导体,并且第一电路连接到第二电路 通过导体。
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公开(公告)号:US07622183B2
公开(公告)日:2009-11-24
申请号:US11385904
申请日:2006-03-22
申请人: Seiji Shirai , Kenichi Shimada , Motoo Asai
发明人: Seiji Shirai , Kenichi Shimada , Motoo Asai
IPC分类号: B32B3/00
CPC分类号: H05K3/4661 , H05K3/108 , H05K3/381 , H05K3/382 , H05K3/421 , H05K3/423 , H05K2201/0129 , H05K2201/015 , H05K2201/0278 , H05K2201/09563 , H05K2201/096 , H05K2201/09745 , Y10T428/24273 , Y10T428/24322 , Y10T428/24917 , Y10T428/31681
摘要: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.
摘要翻译: 本发明提供了一种多层印刷线路板,其具有有利地用于在其上形成精细电路图案的填充通孔结构,并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层构成,层间绝缘树脂层各自形成有各自填充有镀层的孔,以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦,并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半,小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙,并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂,氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。
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公开(公告)号:US20090205857A1
公开(公告)日:2009-08-20
申请号:US12420469
申请日:2009-04-08
申请人: Honchin EN , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin EN , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
IPC分类号: H05K1/03
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: A multilayer printed circuit board including a substrate board having a lower conductor circuit, a resin insulating layer formed over the substrate board and lower conductor circuit, and a conductor circuit formed over the resin insulating layer. The resin insulating layer has a via hole filled up with plating and is formed of a linear polyolefin resin formed by hot-pressing a film shaped resin.
摘要翻译: 一种多层印刷电路板,包括具有下导体电路的基板,形成在基板和下导体电路上的树脂绝缘层,以及形成在树脂绝缘层上的导体电路。 树脂绝缘层具有填充有电镀的通孔,并且通过热压薄膜状树脂形成的线性聚烯烃树脂形成。
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公开(公告)号:US07535095B1
公开(公告)日:2009-05-19
申请号:US09806203
申请日:1999-09-28
申请人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in fracture toughness, dielectric constant, adhesion and processability, among other characteristics.The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.
摘要翻译: 本发明的目的在于提供一种非常令人满意的断裂韧性,介电常数,粘附性和加工性等多种特性的多层印刷电路板。 本发明涉及一种多层印刷电路板,其包括基板,形成在所述基板上的树脂绝缘层和在所述树脂绝缘层上构成的导体电路,其中所述树脂绝缘层包括聚烯烃树脂。
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公开(公告)号:US20090090003A1
公开(公告)日:2009-04-09
申请号:US12146165
申请日:2008-06-25
申请人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
IPC分类号: H05K3/00
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.
摘要翻译: 本发明的目的在于提供一种多层印刷电路板,其特征在于其具有非常好的韧性,介电常数,粘合性和可加工性。 本发明涉及一种多层印刷电路板,其包括基板,形成在所述基板上的树脂绝缘层和在所述树脂绝缘层上构成的导体电路,其中所述树脂绝缘层包括聚烯烃树脂。
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公开(公告)号:US08018045B2
公开(公告)日:2011-09-13
申请号:US12146212
申请日:2008-06-25
申请人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
发明人: Honchin En , Masayuki Hayashi , Dongdong Wang , Kenichi Shimada , Motoo Asai , Koji Sekine , Tohru Nakai , Shinichiro Ichikawa , Yukihiko Toyoda
IPC分类号: H01L23/12 , H01L21/4763
CPC分类号: C23G1/10 , H01L2924/0002 , H05K3/0094 , H05K3/062 , H05K3/067 , H05K3/108 , H05K3/384 , H05K3/385 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K3/4661 , H05K2201/0129 , H05K2201/0158 , H05K2201/0338 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/0307 , H05K2203/0315 , H05K2203/072 , H05K2203/1105 , Y10T29/49124 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , H01L2924/00
摘要: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.
摘要翻译: 本发明的目的在于提供一种多层印刷电路板,其特征在于其具有非常好的韧性,介电常数,粘合性和可加工性。 本发明涉及一种多层印刷电路板,其包括基板,形成在所述基板上的树脂绝缘层和在所述树脂绝缘层上构成的导体电路,其中所述树脂绝缘层包括聚烯烃树脂。
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公开(公告)号:US07916492B1
公开(公告)日:2011-03-29
申请号:US10049270
申请日:2000-07-28
申请人: Hui Zhong , Kenichi Shimada , Yukihiko Toyoda , Motoo Asai , Dongdong Wang , Koji Sekine , Yoshitaka Ono
发明人: Hui Zhong , Kenichi Shimada , Yukihiko Toyoda , Motoo Asai , Dongdong Wang , Koji Sekine , Yoshitaka Ono
CPC分类号: H05K3/285 , H01L2924/15311 , H01L2924/15312 , H05K3/4602
摘要: The present invention is to provide a multilayered printed circuit board free from cracks attributed to thermal expansion difference between a solder resist layer and another part and a multilayered printed circuit board of the present invention comprises a conductor circuit and a resin insulating layer serially formed on a substrate in an alternate fashion and in repetition and a solder resist layer formed as an outermost layer, and the solder resist layer contains an inorganic filler.
摘要翻译: 本发明是提供一种不存在由于阻焊层与另一部分之间的热膨胀差异而引起的裂纹的多层印刷电路板和本发明的多层印刷电路板,其特征在于,包括:导体电路和串联形成在所述多层印刷电路板上的树脂绝缘层 基板以重复的方式和形成为最外层的阻焊层,并且阻焊层包含无机填料。
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