公开(公告)号：US09806117B2

公开(公告)日：2017-10-31

申请号：US15071035

申请日：2016-03-15

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Yuanwei Zheng ,  Gang Chen ,  Duli Mao ,  Dyson H. Tai ,  Yi Ma

IPC: H01L27/14 ,  H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14689

Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material, and a through-semiconductor-via coupled to a negative voltage source. Deep trench isolation structures are disposed between individual photodiodes in the plurality of photodiodes to electrically and optically isolate the individual photodiodes. The deep trench isolation structures include a conductive material coupled to the through-semiconductor-via, and a dielectric material disposed on sidewalls of the deep trench isolation structures between the semiconductor material and the conductive material.

公开(公告)号：US20170221951A1

公开(公告)日：2017-08-03

申请号：US15014787

申请日：2016-02-03

Applicant: OmniVision Technologies, Inc.

Inventor： Yuanwei Zheng ,  Gang Chen ,  Duli Mao ,  Dyson Tai

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L27/14621 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/1469

Abstract: A method of image sensor fabrication includes providing a semiconductor material, an insulation layer, and a logic layer, where the semiconductor material includes a plurality of photodiodes. A through-semiconductor-via is formed which extends from the semiconductor material, through the insulation layer, and into the logic layer. The through-semiconductor-via is capped with a capping layer. A metal pad is disposed in a first trench in the semiconductor material. Insulating material is deposited on the capping layer, and in the first trench in the semiconductor material. A resist is deposited in a second trench in the insulating material, and the second trench in the insulating material is aligned with the metal pad. The insulating material is removed to expose the capping layer, and a portion of the capping layer disposed proximate to the plurality of photodiodes is also removed. A metal grid is formed proximate to the plurality of photodiodes.

公开(公告)号：US09565405B2

公开(公告)日：2017-02-07

申请号：US14612961

申请日：2015-02-03

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen ,  Dominic Massetti ,  Chih-Wei Hsiung ,  Arvind Kumar ,  Yuanwei Zheng ,  Duli Mao ,  Dyson H. Tai

IPC: H04N9/04 ,  H01L27/146 ,  H04N5/3745

CPC classification number: H04N9/045 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14647 ,  H04N5/37457

Abstract: A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry on the front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.

Abstract translation: 背面照明图像传感器包括包括半导体材料的像素阵列和设置在半导体材料的前侧上以控制像素阵列的操作的图像传感器电路。 第一像素包括靠近半导体材料的背面设置的第一掺杂区域，并延伸到半导体材料中以到达图像传感器电路的第一深度。 具有第二掺杂区域的第二像素设置在半导体材料的背面附近并且延伸到半导体材料中的比第一深度小的第二深度。 第三掺杂区域设置在半导体材料的前侧上的第二掺杂区域和图像传感器电路之间。 第三掺杂区域与第一掺杂区域和第二掺杂区域电隔离。

公开(公告)号：US09240431B1

公开(公告)日：2016-01-19

申请号：US14790330

申请日：2015-07-02

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Yuanwei Zheng ,  Gang Chen ,  Duli Mao ,  Dyson H. Tai ,  Chih-Wei Hsiung ,  Arvind Kumar

IPC: H01L21/00 ,  H01L27/146

CPC classification number: H01L27/14687 ,  H01L21/76224 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14689

Abstract: An image sensor including a plurality of photodiodes disposed in a semiconductor layer and a plurality of deep trench isolation regions disposed in the semiconductor layer. The plurality of deep trench isolation regions include: (1) an oxide layer disposed on an inner surface of the plurality of deep trench isolation regions and (2) a conductive fill disposed in the plurality of deep trench isolation regions where the oxide layer is disposed between the semiconductor layer and the conductive fill. A plurality of pinning wells is also disposed in the semiconductor layer, and the plurality of pinning wells in combination with the plurality of deep trench isolation regions separate individual photodiodes in the plurality of photodiodes. A fixed charge layer is disposed on the semiconductor layer, and the plurality of deep trench isolation regions are disposed between the plurality of pinning wells and the fixed charge layer.

公开(公告)号：US09111993B1

公开(公告)日：2015-08-18

申请号：US14465054

申请日：2014-08-21

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Yuanwei Zheng ,  Gang Chen ,  Duli Mao ,  Dyson H. Tai ,  Chih-Wei Hsiung ,  Arvind Kumar

IPC: H01L21/76 ,  H01L21/762

CPC classification number: H01L27/14687 ,  H01L21/76224 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14689

Abstract: An image sensor including a plurality of photodiodes disposed in a semiconductor layer and a plurality of deep trench isolation regions disposed in the semiconductor layer. The plurality of deep trench isolation regions include: (1) an oxide layer disposed on an inner surface of the plurality of deep trench isolation regions and (2) a conductive fill disposed in the plurality of deep trench isolation regions where the oxide layer is disposed between the semiconductor layer and the conductive fill. A plurality of pinning wells is also disposed in the semiconductor layer, and the plurality of pinning wells in combination with the plurality of deep trench isolation regions separate individual photodiodes in the plurality of photodiodes. A fixed charge layer is disposed on the semiconductor layer, and the plurality of deep trench isolation regions are disposed between the plurality of pinning wells and the fixed charge layer.

Abstract translation: 包括设置在半导体层中的多个光电二极管和设置在半导体层中的多个深沟槽隔离区域的图像传感器。 多个深沟槽隔离区域包括：（1）设置在多个深沟槽隔离区域的内表面上的氧化物层和（2）设置在多个深沟槽隔离区域中的导电填料，其中设置氧化物层 在半导体层和导电填料之间。 多个钉扎阱也设置在半导体层中，并且多个钉扎阱与多个深沟槽隔离区域组合分离多个光电二极管中的各个光电二极管。 固定电荷层设置在半导体层上，多个深沟槽隔离区设置在多个钉扎阱和固定电荷层之间。

公开(公告)号：US12176364B2

公开(公告)日：2024-12-24

申请号：US17562577

申请日：2021-12-27

Applicant: OmniVision Technologies, Inc.

Inventor： Shiyu Sun ,  Yuanwei Zheng

IPC: H01L27/146

Abstract: An image sensor includes a semiconductor substrate and a multilayer film. The semiconductor substrate includes a photodiode and a back surface having a recessed region that surrounds the photodiode. The multilayer film is on, and conformal to, the recessed region, and includes N layer-groups of adjacent high-κ material layers. Each pair of adjacent high-κ material layers of a same layer-group of the N layer-groups includes (i) an outer-layer having an outer fixed-charge density and (ii) an inner-layer, located between the outer-layer and the recessed region, that has an inner fixed-charge density. Each of the outer and inner fixed-charge density is negative. The inner fixed-charge density is more negative than the outer fixed-charge density.

公开(公告)号：US20240304642A1

公开(公告)日：2024-09-12

申请号：US18180731

申请日：2023-03-08

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Chao Niu ,  Yuanwei Zheng ,  Zhiqiang Lin

IPC: H01L27/146 ,  H04N25/78

CPC classification number: H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14647 ,  H04N25/78

Abstract: A pixel array includes 2×2 groupings of photodiodes to generate image charge in response to incident light directed through a back side of the semiconductor layer. A Quad Bayer filter is disposed over the back side of the semiconductor layer over the 2×2 groupings of photodiodes. Each color filter of the Quad Bayer CFA is disposed over a respective one of the plurality of 2×2 groupings of photodiodes. Trench balance structures are disposed in the semiconductor layer. Each of the trench balance structures is disposed in the semiconductor layer between one of the photodiodes and a respective one of the red color filters of the Quad Bayer filter. None of the trench balance structures are disposed between any of the photodiodes and respective green color filters or blue color filters of the Quad Bayer filter.

公开(公告)号：US11862678B2

公开(公告)日：2024-01-02

申请号：US16905625

申请日：2020-06-18

Applicant: OmniVision Technologies, Inc.

Inventor： Yuanwei Zheng ,  Sing-Chung Hu ,  Gang Chen ,  Dyson Tai ,  Lindsay Grant

IPC: H01L27/146 ,  H01L29/06

CPC classification number: H01L29/0653 ,  H01L27/1463 ,  H01L27/14612 ,  H01L27/14643 ,  H01L27/14689

Abstract: A pixel-array substrate includes a semiconductor substrate with a pixel array, a back surface, and a front surface, and a guard ring formed of a doped semiconductor, enclosing the pixel array, and extending into the semiconductor substrate from the front surface, the back surface forming a trench extending into the semiconductor substrate, the trench overlapping the guard ring. A method for reducing leakage current into a pixel-array includes doping a semiconductor substrate to form a guard ring that extends into the semiconductor substrate from a front surface, encloses a pixel array, excludes a periphery region, and resists a flow of electric current, and forming, into a back surface of the semiconductor substrate, a trench that penetrates into the back surface and overlaps the guard ring, the guard ring and the trench configured to resist the flow of electric current between the pixel array and the periphery region.

公开(公告)号：US20230207587A1

公开(公告)日：2023-06-29

申请号：US18177494

申请日：2023-03-02

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Chiao-Ti Huang ,  Sing-Chung Hu ,  Yuanwei Zheng ,  Bill Phan

IPC: H01L27/146 ,  H01L29/66 ,  H01L21/762 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L27/14616 ,  H01L27/1463 ,  H01L27/14614 ,  H01L27/14643 ,  H01L29/66795 ,  H01L21/76224 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4236 ,  H01L29/7856 ,  H01L27/14603 ,  H01L27/14641 ,  H01L29/7851

Abstract: An image sensor includes a photodiode disposed in a semiconductor substrate having a first surface and a second surface opposite to the first surface. A floating diffusion is disposed in the semiconductor substrate. A transfer transistor is configured for coupling the photodiode to the floating diffusion. The transfer transistor includes a vertical transfer gate extending a first depth in a depthwise direction from the first surface into the semiconductor substrate. A transistor is coupled to the floating diffusion. The transistor includes: a planar gate disposed proximate to the first surface of the semiconductor substrate; and a plurality of vertical gate electrodes, each extending a respective depth into the semiconductor substrate from the planar gate in the depthwise direction. The respective depth of at least one of the plurality of vertical gate electrodes is the same as the first depth of the vertical transfer gate.

公开(公告)号：US20180033811A1

公开(公告)日：2018-02-01

申请号：US15717047

申请日：2017-09-27

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Yuanwei Zheng ,  Gang Chen ,  Duli Mao ,  Dyson H. Tai ,  Yi Ma

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14689

Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material, and a through-semiconductor-via coupled to a negative voltage source. Deep trench isolation structures are disposed between individual photodiodes in the plurality of photodiodes to electrically and optically isolate the individual photodiodes. The deep trench isolation structures include a conductive material coupled to the through-semiconductor-via, and a dielectric material disposed on sidewalls of the deep trench isolation structures between the semiconductor material and the conductive material.