中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

48 records (took 0.017 seconds)

    Statistical Temperature Sensor Calibration Apparatus and Methodology
    21.
    发明申请
    Statistical Temperature Sensor Calibration Apparatus and Methodology 审中-公开

    公开(公告)号：US20180283964A1

    公开(公告)日：2018-10-04

    申请号：US15695883

    申请日：2017-09-05

    Applicant: Oracle International Corporation

    Inventor： Sebastian Turullols ,  Ha Pham ,  Changku Hwang ,  Yifan YangGong ,  Qing Xie

    IPC: G01K15/00 ,  G01K7/01

    CPC classification number: G01K15/005 ,  G01K7/01

    Abstract: A method and apparatus for calibrating a temperature sensor is disclosed. In one embodiment, a method comprises generating first and second digital values based respectively on first and second voltages applied to a portion of a temperature sensor circuit. An arithmetic circuit may derive the value of the second voltage based on the first and second digital values. The method further comprises determining an initial value of a constant based on values of the first and second voltages, and determining a final value of the constant based on the initial voltage and at least one voltage offset. The constant may then be used in determining temperature readings for the temperature sensor.

    Asymmetric locking technique for asymmetric frequency locked loop
    22.
    发明授权
    Asymmetric locking technique for asymmetric frequency locked loop 有权

    公开(公告)号：US09954540B1

    公开(公告)日：2018-04-24

    申请号：US15462514

    申请日：2017-03-17

    Applicant: Oracle International Corporation

    Inventor： Yifan YangGong ,  Sebastian Turullols ,  Changku Hwang ,  Nicolas M. Huynh ,  Daniel S. Woo

    IPC: H03L7/099 ,  H03L7/081 ,  H03L5/00 ,  H03L7/07

    CPC classification number: H03L7/07 ,  H03L7/0995

    Abstract: A system that generates a click signal includes a first digitally controlled oscillator (DCO) having a first fundamental frequency, and a second DCO having a second fundamental frequency. The system also includes a Muller C-element, which combines outputs of the first and second DCOs to produce the clock signal, which feeds back into the first and second DCOs. During a calibration operation, while the second DCO is set to a frequency larger than the target frequency, the system adjusts the first DCO with reference to a first feedback loop, which includes the first DCO, so that the clock signal matches the target frequency, and while the first DCO is set to the adjusted first fundamental frequency plus a frequency offset, the system adjusts the second DCO with reference to a second feedback loop, which includes the second DCO, so that the clock signal matches the target frequency.

    High accuracy, compact on-chip temperature sensor
    23.
    发明授权
    High accuracy, compact on-chip temperature sensor 有权

    公开(公告)号：US09841325B2

    公开(公告)日：2017-12-12

    申请号：US14524392

    申请日：2014-10-27

    Applicant: Oracle International Corporation

    Inventor： Changku Hwang ,  Ha Pham ,  Daisy Jian ,  Sebastian Turullols

    IPC: G01K7/00 ,  G01K7/01 ,  G01R19/10 ,  G01R19/25

    CPC classification number: G01K7/00 ,  G01K7/01 ,  G01K2219/00 ,  G01R19/10 ,  G01R19/2506

    Abstract: Embodiments of a temperature sensing apparatus are disclosed. The apparatus may include a voltage generator and circuitry. The voltage generator may generate a first voltage level and a second voltage level dependent on an operating temperature. In response to a given change in the operating temperature, the first and second voltage levels may change, with the second voltage level changing by a different amount than the first voltage level. The voltage generator may generate a third voltage level. The circuitry may measure the first voltage level, the second voltage level, and the third voltage level, and may calculate the operating temperature dependent on a ratio of a difference between the first voltage level and the second voltage level and the third voltage level.

    ADAPTIVE METHOD FOR CALIBRATING MULTIPLE TEMPERATURE SENSORS ON A SINGLE SEMICONDUCTOR DIE
    24.
    发明申请
    ADAPTIVE METHOD FOR CALIBRATING MULTIPLE TEMPERATURE SENSORS ON A SINGLE SEMICONDUCTOR DIE 审中-公开

    公开(公告)号：US20170089769A1

    公开(公告)日：2017-03-30

    申请号：US14865149

    申请日：2015-09-25

    Applicant: Oracle International Corporation

    Inventor： Venkatram Krishnaswamy ,  Sebastian Turullols

    IPC: G01K15/00

    CPC classification number: G01K15/005

    Abstract: A system is disclosed, including an interface to a DUT and a testing apparatus. The DUT includes a first plurality of temperature sensing circuits. The testing apparatus may store a plurality of control values. Each control value may depend on at least two calibration values of corresponding temperature sensing circuits of a second plurality of temperature sensing circuits. The testing apparatus may generate a plurality of calibration values for the DUT. Each calibration value corresponds to one of the first plurality of temperature sensing circuits. The testing apparatus may determine a plurality of test values for the DUT. The testing apparatus may calculate a probability value, and repeat generation of the plurality of calibration values upon determining that the probability value is less than a predetermined threshold value. The probability value corresponds to a likelihood that the plurality of calibration values is accurate.

    DIGITAL VOLTAGE DROOP MONITOR WITH CLOCK JITTER ADJUSTMENT
    25.
    发明申请
    DIGITAL VOLTAGE DROOP MONITOR WITH CLOCK JITTER ADJUSTMENT 有权
    数字电压监视器与时钟抖动调整

    公开(公告)号：US20160034014A1

    公开(公告)日：2016-02-04

    申请号：US14691352

    申请日：2015-04-20

    Applicant: Oracle International Corporation

    Inventor： Sebastian Turullols ,  Vijay Srinivasan ,  Changku Hwang

    IPC: G06F1/32 ,  H03K5/159 ,  H03K3/037

    CPC classification number: G01R31/31725 ,  G01R31/3004 ,  G01R31/31937 ,  G06F1/3206 ,  G06F1/3296 ,  H03K3/037 ,  H03K5/133 ,  H03K5/159

    Abstract: Implementations of the present disclosure involve a system and/or method for measuring on-die voltage levels of an integrated circuit through a digital sampling circuit. In particular, the system and/or method utilize a delay line based analog-to-digital sampling circuit that produces a voltage reading over time, such as at every high frequency clock cycle. In one embodiment, the digital sampling circuit may include a clock jitter monitor circuit configured with a constant supply voltage. This clock jitter monitor is configured to measure the clock jitter that is experienced by the digital voltage monitor circuit and, when compared to measured voltage captured by the circuit, may be used to calibrate or otherwise correct the readings provided by the digital voltage monitor circuit.

    Abstract translation: 本公开的实现涉及用于通过数字采样电路测量集成电路的片上电压电平的系统和/或方法。 特别地，系统和/或方法利用基于延迟线的模数 - 数字采样电路，其产生随时间的电压读数，例如在每个高频时钟周期。 在一个实施例中，数字采样电路可以包括配置有恒定电源电压的时钟抖动监视电路。 该时钟抖动监视器被配置为测量数字电压监视器电路经历的时钟抖动，并且当与电路捕获的测量电压相比较时，可以使用它来校准或以其他方式校正由数字电压监视器电路提供的读数。

    Multiple clock domain cycle skipping utilizing optimal mask to minimize voltage noise
    26.
    发明授权
    Multiple clock domain cycle skipping utilizing optimal mask to minimize voltage noise 有权
    利用最佳掩模的多个时钟域周期跳过来最小化电压噪声

    公开(公告)号：US08949651B2

    公开(公告)日：2015-02-03

    申请号：US13631296

    申请日：2012-09-28

    Applicant: Oracle International Corporation

    Inventor： Sebastian Turullols

    IPC: G06F1/08 ,  H03K17/16

    CPC classification number: G06F1/08 ,  G06F1/10 ,  G06F1/324 ,  H03K17/16 ,  Y02D10/126

    Abstract: Implementations of the present disclosure involve an apparatus and/or method for providing one or more clock signals that include a skipped clock cycle to a portion of a computing system. The skipped cycle clock signals may be changed by the computing system during operation of the system by altering masks applied to a global clock signal. However, the flexibility to alter various skipped cycle clock signals may introduce noise or signal disruptions within the system. Thus, the present disclosure may also involve an apparatus and/or method for managing the altering of the clock cycle skipping masks to manage the voltage noise introduced into the system by the adjustment of the operating frequency of the portions of the system. In one embodiment, the method includes prioritizing or otherwise ordering the bits of the masks applied to the global clock signal to attempt to prevent similar bits from being altered simultaneously.

    Abstract translation: 本公开的实现涉及用于向计算系统的一部分提供包括跳过的时钟周期的一个或多个时钟信号的装置和/或方法。 跳过的周期时钟信号可以由系统操作期间的计算系统通过改变施加到全局时钟信号的掩码来改变。 然而，改变各种跳过周期时钟信号的灵活性可能在系统内引入噪声或信号中断。 因此，本公开还可以涉及用于管理改变时钟周期跳过掩码以通过调整系统的部分的操作频率来管理引入到系统中的电压噪声的装置和/或方法。 在一个实施例中，该方法包括将应用于全局时钟信号的掩码的比特优先化或以其他方式排序，以试图防止同时改变类似的比特。

    ADAPTIVE METHOD FOR CALIBRATING MULTIPLE TEMPERATURE SENSORS ON A SINGLE SEMICONDUCTOR DIE
    27.
    发明公开
    ADAPTIVE METHOD FOR CALIBRATING MULTIPLE TEMPERATURE SENSORS ON A SINGLE SEMICONDUCTOR DIE 审中-公开

    公开(公告)号：US20230314240A1

    公开(公告)日：2023-10-05

    申请号：US18328841

    申请日：2023-06-05

    Applicant: Oracle International Corporation

    Inventor： Venkatram Krishnaswamy ,  Sebastian Turullols

    IPC: G01K15/00

    CPC classification number: G01K15/005

    Abstract: A system is disclosed, including an interface to a DUT and a testing apparatus. The DUT includes a first plurality of temperature sensing circuits. The testing apparatus may store a plurality of control values. Each control value may depend on at least two calibration values of corresponding temperature sensing circuits of a second plurality of temperature sensing circuits. The testing apparatus may generate a plurality of calibration values for the DUT. Each calibration value corresponds to one of the first plurality of temperature sensing circuits. The testing apparatus may determine a plurality of test values for the DUT. The testing apparatus may calculate a probability value, and repeat generation of the plurality of calibration values upon determining that the probability value is less than a predetermined threshold value. The probability value corresponds to a likelihood that the plurality of calibration values is accurate.

    Adaptive method for calibrating multiple temperature sensors on a single semiconductor die
    28.
    发明授权
    Adaptive method for calibrating multiple temperature sensors on a single semiconductor die 有权

    公开(公告)号：US11703400B2

    公开(公告)日：2023-07-18

    申请号：US16459464

    申请日：2019-07-01

    Applicant: Oracle International Corporation

    Inventor： Venkatram Krishnaswamy ,  Sebastian Turullols

    IPC: G01K15/00

    CPC classification number: G01K15/005

    Abstract: A system is disclosed, including an interface to a DUT and a testing apparatus. The DUT includes a first plurality of temperature sensing circuits. The testing apparatus may store a plurality of control values. Each control value may depend on at least two calibration values of corresponding temperature sensing circuits of a second plurality of temperature sensing circuits. The testing apparatus may generate a plurality of calibration values for the DUT. Each calibration value corresponds to one of the first plurality of temperature sensing circuits. The testing apparatus may determine a plurality of test values for the DUT. The testing apparatus may calculate a probability value, and repeat generation of the plurality of calibration values upon determining that the probability value is less than a predetermined threshold value. The probability value corresponds to a likelihood that the plurality of calibration values is accurate.

Patent Agency Ranking