公开(公告)号：US06100829A

公开(公告)日：2000-08-08

申请号：US954167

申请日：1997-10-20

申请人： Lisa Fredrickson ,  Dennis C. Stone ,  LeRoy Volz

发明人： Lisa Fredrickson ,  Dennis C. Stone ,  LeRoy Volz

IPC分类号： G11B5/584 ,  G11B5/596 ,  G11B20/10 ,  G11B21/10 ,  G11B27/30 ,  H03M1/00

CPC分类号： G11B20/10009 ,  G11B21/10 ,  G11B27/3027 ,  G11B5/584 ,  G11B5/59605 ,  G11B5/59688 ,  G11B5/59683

摘要： A digital peak detection system digitizes analog signals and provides absolute values to a series of one cycle delays, and to a sequence of comparator stages. Each digital sample is parallel compared to a number of preceding samples equal to the number of active comparator stages. Control signals activate comparator stages to determine sample comparison window length, including lengths exceeding the number of samples between recorded peaks. Peak detection is optimized using a variable gain amplifier whose gain is updated based upon amplitude difference between actual and desired peak samples. When sample amplitudes are smaller than a qualifier threshold, a countdown timer increases amplifier gain after lapse of a programmed time without detecting a qualified pulse. Gain is also updated when the analog to digital converter saturates. Initial gain values can be programmed, and gain stored at the end of a servo mode for future use in reducing gain control loop convergence time.

摘要翻译： 数字峰值检测系统对模拟信号进行数字化，并提供一系列一个周期延迟的绝对值，以及一系列比较器级。 每个数字样本与先前的多个样本相比较，与等效于有效比较器级的数量相比较。 控制信号激活比较器级，以确定采样比较窗口长度，包括长度超过记录峰值之间的采样数。 使用可变增益放大器优化峰值检测，该增益放大器基于实际峰值和期望峰值样本之间的幅度差值来更新增益。 当采样幅度小于限定阈值时，倒计时定时器在经过编程时间之后增加放大器增益，而不检测合格脉冲。 当模数转换器饱和时，增益也会更新。 可以对初始增益值进行编程，并在伺服模式结束时存储增益，以备将来用于降低增益控制回路收敛时间。

公开(公告)号：US09191029B2

公开(公告)日：2015-11-17

申请号：US14318680

申请日：2014-06-29

申请人： Lisa Fredrickson

发明人： Lisa Fredrickson

IPC分类号： H03M13/00 ,  H03M13/15 ,  H03M13/13

CPC分类号： H03M13/154 ,  H03M13/134 ,  H03M13/1545 ,  H03M13/1565 ,  H03M13/1585 ,  H03M13/611 ,  H03M13/616

摘要： An encoder provides (2t−1) redundant symbols in a sequence of n coded symbols, and a decoder corrects up to t erroneous symbols in the sequence of n coded symbols corrupted by a plurality of symbol errors. The decoder uses an improved decoding method, the method solving a plurality of matrix equations, each matrix equation associated with a hypothetical location of error. By monitoring a plurality of solutions associated with hypothetical locations of error, a processor determines the actual number of errors, the locations of the erroneous symbols in the sequence of n symbols, and the erroneous symbol value at each error location. The improved decoder includes erasure processing and a correct symbol determination method similar to erasure processing.

摘要翻译： 编码器在n个编码符号的序列中提供（2t-1）冗余符号，并且解码器校正由多个符号错误损坏的n个编码符号的序列中的t个错误符号。 解码器使用改进的解码方法，该方法解决多个矩阵方程，每个矩阵方程与误差的假设位置相关联。 通过监视与假设误差位置相关联的多个解决方案，处理器确定实际的错误数目，n个符号序列中的错误符号的位置以及每个错误位置处的错误符号值。 改进的解码器包括擦除处理和类似于擦除处理的正确符号确定方法。

公开(公告)号：US20150007000A1

公开(公告)日：2015-01-01

申请号：US14318680

申请日：2014-06-29

申请人： Lisa Fredrickson

发明人： Lisa Fredrickson

IPC分类号： H03M13/13

CPC分类号： H03M13/154 ,  H03M13/134 ,  H03M13/1545 ,  H03M13/1565 ,  H03M13/1585 ,  H03M13/611 ,  H03M13/616

摘要： An encoder provides (2t−1) redundant symbols in a sequence of n coded symbols, and a decoder corrects up to t erroneous symbols in the sequence of n coded symbols corrupted by a plurality of symbol errors. The decoder uses an improved decoding method, the method solving a plurality of matrix equations, each matrix equation associated with a hypothetical location of error. By monitoring a plurality of solutions associated with hypothetical locations of error, a processor determines the actual number of errors, the locations of the erroneous symbols in the sequence of n symbols, and the erroneous symbol value at each error location. The improved decoder includes erasure processing and a correct symbol determination method similar to erasure processing.

摘要翻译： 编码器在n个编码符号的序列中提供（2t-1）冗余符号，并且解码器校正由多个符号错误损坏的n个编码符号的序列中的t个错误符号。 解码器使用改进的解码方法，该方法解决多个矩阵方程，每个矩阵方程与误差的假设位置相关联。 通过监视与假设误差位置相关联的多个解决方案，处理器确定实际的错误数目，n个符号序列中的错误符号的位置以及每个错误位置处的错误符号值。 改进的解码器包括擦除处理和类似于擦除处理的正确符号确定方法。

公开(公告)号：US06470474B1

公开(公告)日：2002-10-22

申请号：US09397941

申请日：1999-09-17

申请人： Lisa Fredrickson ,  Vladimir Kovner

发明人： Lisa Fredrickson ,  Vladimir Kovner

IPC分类号： H03M1303

CPC分类号： G11B20/10212 ,  G11B20/10046 ,  G11B20/10055 ,  G11B20/1803

摘要： A method and apparatus are provided for identifying errors in a detected sequence of values generates the detected sequence of values from channel samples using a detector designed for a channel with a first channel response characteristic. The detected sequence of values is filtered using a filter that emulates a second channel response characteristic to produce a sequence of simulated second channel samples. The channel samples provided to the detector are also provided to a second filter which emulates a response characteristic equal to the second channel response characteristic divided by the first channel response characteristic. This produces a sequence of actual second channel samples. A sequence of difference values is then generated by subtracting each of the simulated second channel samples from a corresponding actual second channel sample. Using the sequence of difference values, at least one error is identified in the detected sequence of values.

摘要翻译： 提供了一种用于识别检测到的值序列中的错误的方法和装置，使用为具有第一信道响应特性的信道设计的检测器从信道样本生成检测到的值序列。 使用滤波器对所检测的值序列进行滤波，该滤波器模拟第二信道响应特性以产生模拟的第二信道样本序列。 提供给检测器的信道样本也被提供给第二滤波器，该滤波器仿真等于第二信道响应特性除以第一信道响应特性的响应特性。 这产生一系列实际的第二通道样品。 然后通过从对应的实际第二通道样本中减去每个模拟的第二通道样本来产生差值序列。 使用差值的序列，在检测到的值序列中识别至少一个错误。

公开(公告)号：US06400288B1

公开(公告)日：2002-06-04

申请号：US09397935

申请日：1999-09-17

申请人： Lisa Fredrickson ,  Anuradha Sukhija

发明人： Lisa Fredrickson ,  Anuradha Sukhija

IPC分类号： H03M700

CPC分类号： H03M5/145

摘要： An encoder is provided that converts data words into code words. The code words, when concatenated together, are such that sub-strings of consecutive first symbols in the code words have no more symbols than a maximum number; sub-strings having the maximum number of consecutive first symbols and beginning at selected locations within the code words appear without restriction, and sub-strings having the maximum number of consecutive first symbols and beginning at locations other than the selected locations appear only where the sub-string is concatenated with an acceptable secondary sub-string. A method is also provided for generating a set of such code words for an encoder.

摘要翻译： 提供了一种将数据字转换为码字的编码器。 代码字连接在一起时，代码字中连续的第一个符号的子串不超过最大数字的符号; 具有连续的第一符号的最大数量的子串并且在码字内的选定位置开始的子串没有限制地出现，并且具有最大数量的连续的第一符号并且从除所选择的位置以外的位置开始的子串仅出现在子 串连接与可接受的辅助子串。 还提供了一种用于为编码器生成一组这样的代码字的方法。

公开(公告)号：US06263032B1

公开(公告)日：2001-07-17

申请号：US08945063

申请日：1997-10-14

申请人： Lisa Fredrickson ,  Vladimir Kovner ,  Dennis W. Hogg

发明人： Lisa Fredrickson ,  Vladimir Kovner ,  Dennis W. Hogg

IPC分类号： H04L702

CPC分类号： H04L7/0062 ,  G11B20/10037 ,  G11B20/10527 ,  G11B20/1403 ,  G11B20/18 ,  H03L7/091 ,  H04L7/0334 ,  H04L25/03038 ,  H04L25/497

摘要： A phase detector for a timing control loop provided in a signal sampling system to control taking samples by a sampler of input signals provided to a signal sampling system to result in a signal sample sequence output using a slope estimator and an error determiner with a phase error estimator combiner. The combiner output is provided to a summer directly and through a delay element to form phase error estimates.

摘要翻译： 一种用于定时控制环的相位检测器，其设置在信号采样系统中，以控制通过采样器提供的采样器提供给信号采样系统的结果，以使用斜率估计器输出信号采样序列，并具有相位误差的误差确定器 估计器组合器。 组合器输出通过延迟元件直接提供给夏季以形成相位误差估计。

公开(公告)号：US06233289B1

公开(公告)日：2001-05-15

申请号：US08895126

申请日：1997-07-16

申请人： Lisa Fredrickson

发明人： Lisa Fredrickson

IPC分类号： H03D100

CPC分类号： H04L1/0059 ,  G11B20/10009 ,  G11B20/1426 ,  G11B2020/1434 ,  H03M5/145 ,  H04L1/0054

摘要： Signals indicative of unencoded input data are encoded into a plurality of encoded sequences. A first subset of the plurality of encoded sequences are encoded according to a k constrained code of rate x/y and a second subset of the plurality of unencoded sequences are encoded according to a k constrained code of rate m/n wherein x/y≠m/n. The encoded sequences are transmitted to a partial response channel subject to noise. The encoded sequences are transmitted from the channel to a Viterbi detector having a trellis structure with a preselected, time-dependent pattern to create a time varying trellis structure for limiting a maximum length of parallel paths therethrough. The encoded sequences are detected with a Viterbi detector to provide detected, encoded sequences. The detected, encoded sequences are then decoded to provide an estimate of the input data.

摘要翻译： 指示未编码的输入数据的信号被编码成多个编码序列。 多个编码序列的第一子集根据速率为x / y的ak约束码进行编码，并且多个未编码序列的第二子集根据速率m / n的ak约束码进行编码，其中x / y> / n。 经编码的序列被发送到受噪声影响的部分响应信道。 编码的序列从通道传输到具有预选的时间依赖图案的网格结构的维特比检测器，以产生用于限制通过其的平行路径的最大长度的时变网格结构。 用维特比检测器检测编码的序列，以提供检测到的编码序列。 然后对所检测的编码序列进行解码以提供输入数据的估计。

公开(公告)号：US6154870A

公开(公告)日：2000-11-28

申请号：US89874

申请日：1998-06-04

申请人： Lisa Fredrickson ,  Reza M. Dehmohseni

发明人： Lisa Fredrickson ,  Reza M. Dehmohseni

IPC分类号： G11B20/10 ,  H03M13/25 ,  H03M13/41 ,  H03M13/03

CPC分类号： G11B20/10064 ,  G11B20/10009 ,  G11B20/10074 ,  H03M13/256 ,  H03M13/41 ,  H03M13/4161 ,  H03M13/6343 ,  H03M13/6505

摘要： A Viterbi PRML system and method providing a new code with distance properties such that some tribits are allowed but no longer sequences are allowed. A code rate 8/ 9 is constructed for EPR4 and E.sup.2 PR4 channels and the system independently maps 8-bit blocks of user data to 9-bit channel sequences. The precoder has transfer function, f(D)=1/(1.sym.D), and produces a binary channel input x(D), which is fed to a coder, to provide an output signal y(D), which is transmitted and corrupted by noise. The corrupted signal is received and fed to a Viterbi detector. The signal is decoded to produce an estimate of the 8-bit data bytes, as reconstructed to be freed from noise corruption. The encoding protocol of the invention is implemented in the encoder. The protocol is: no sequence of 4 consecutive transitions occurs in any 9-bit codeword; no 9-bit codeword ends with a sequence of 2 or more consecutive transitions; no 9-bit codeword begins with more than 2 consecutive transitions; and sequences of 3 consecutive transitions, if any, begin only on a 2nd, 4th, 6th, or 9th bit of said 9-bit codeword. The protocol is preferably augmented by an additional constraint: no 9-bit codeword has the same 1st, 3rd, 5th, 7th, and 9th bit. Other limitations on coding are described to enhance the performance of the system.

摘要翻译： 维特比PRML系统和方法提供具有距离属性的新代码，使得允许一些三进制但不允许序列。 为EPR4和E2PR4通道构建码率8/9，系统将8位用户数据块独立地映射到9位通道序列。 预编码器具有传递函数f（D）= 1 /（1（+）D），并产生馈送到编码器的二进制信道输入x（D），以提供输出信号y（D），其中 被噪声传输和损坏。 接收到损坏的信号并将其馈送到维特比检测器。 对信号进行解码，以产生8位数据字节的估计，重建为免除噪声损坏。 本发明的编码协议在编码器中实现。 协议是：在任何9位码字中不发生4个连续转换序列; 没有9位码字以2个或更多个连续转换的序列结束; 没有9位码字以超过2个连续的转换开始; 并且如果有的话，3个连续转换的序列仅在所述9位码字的第2，第4，第6或第9位上开始。 该协议优选地通过附加约束来增强：否9位码字具有相同的第1，第3，第5，第7和第9位。 描述编码的其他限制，以增强系统的性能。

公开(公告)号：US6104765A

公开(公告)日：2000-08-15

申请号：US930877

申请日：1997-10-07

申请人： Lisa Fredrickson

发明人： Lisa Fredrickson

IPC分类号： G11B5/09 ,  G11B20/10 ,  H03M13/41 ,  H04L27/06 ,  G11B3/90 ,  H03D1/00 ,  H04N5/76

CPC分类号： H03M13/6343 ,  G11B20/10009 ,  H03M13/3961 ,  H03M13/41 ,  G11B5/09

摘要： A data symbol sequence detector for choosing data symbol sequences likely to be represented by corresponding sequences of samples received by the detector with these sample sequences formed by sampling data signals obtained from magnetically stored data through a data retrieval channel which asymmetrically affects the magnitudes of the data signals. An expected sample value estimator provides estimated expected magnitude values for a selected set of samples in the sequence, and a magnitude difference determiner is used for obtaining representations of differences between values of the samples in the sequence and the corresponding estimated expected values. These differences representations can be limited in algebraic form.

摘要翻译： PCT No.PCT / US97 / 13106 Sec。 371日期1997年10月7日第 102（e）日期1997年10月7日PCT 1997年7月22日PCT公布。 出版物WO98 / 04032 日期1998年1月29日一种数据符号序列检测器，用于选择可能由由检测器接收的样本的相应序列表示的数据符号序列，这些采样序列通过对从磁存储数据获得的数据信号进行采样而形成，该数据信号通过不对称影响的数据检索通道 数据信号的幅度。 预期样本值估计器为序列中所选择的一组样本提供估计的预期幅度值，并且使用幅度差确定器来获得序列中的样本的值与相应的估计预期值之间的差异的表示。 这些差异表示可以以代数形式来限制。

公开(公告)号：US5805799A

公开(公告)日：1998-09-08

申请号：US566361

申请日：1995-12-01

申请人： Lisa Fredrickson ,  Clifford Gold ,  Stanley M. Chang

发明人： Lisa Fredrickson ,  Clifford Gold ,  Stanley M. Chang

IPC分类号： G06F11/10 ,  G11B20/18 ,  H03M13/00 ,  H04L1/00 ,  G06F11/00

CPC分类号： H04L1/0057 ,  G06F11/1004 ,  G11B20/1833 ,  H03M13/00 ,  G06F11/10 ,  G06F2211/1007

摘要： According to the invention, a data integrity code including logical block address ("LBA") and circuit implementation are provided. The code and implementing circuitry are utilized to enable data block LBA verification during a block transfer and retrieval process. The preferred data integrity code has embedded LBA information and also serves as a crosscheck code used to detect miscorrection by an error correction code ("ECC"). In a preferred disk drive embodiment, data integrity block ("DIB") is provided to verify that the LBA value associated with a given data block in a host interface matches the value associated with that same data block in a buffer memory and in a data sequencer. In a preferred method of use, data integrity/cross-check redundancy with LBA is appended to data blocks transmitted to a buffer memory and verified after the data block has been transferred from the buffer. After verification, the LBA is preferably written to the storage medium together with its associated data block to enable later LBA verification for blocks recovered from the storage medium. The LBA may also be verified when the data block is transferred back to a host from the buffer memory.

摘要翻译： 根据本发明，提供了包括逻辑块地址（“LBA”）和电路实现的数据完整性代码。 代码和实现电路用于在块传输和检索过程期间启用数据块LBA验证。 优选的数据完整性代码具有嵌入的LBA信息，并且还用作用于通过纠错码（“ECC”）检测错误纠错的交叉检查代码。 在优选的磁盘驱动器实施例中，提供数据完整性块（“DIB”）以验证与主机接口中的给定数据块相关联的LBA值是否与缓冲存储器中的相同数据块相关联的值和数据 音序器 在优选的使用方法中，利用LBA的数据完整性/交叉校验冗余被附加到发送到缓冲存储器的数据块，并且在从缓冲器传送数据块之后验证。 在验证之后，优选地将LBA与其相关联的数据块一起写入存储介质，以便对从存储介质恢复的块进行后续的LBA验证。 当数据块从缓冲存储器传回主机时，也可以验证LBA。