公开(公告)号：US20240026537A1

公开(公告)日：2024-01-25

申请号：US18218148

申请日：2023-07-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuya KAKEHATA ,  Sachiko KAWAKAMI ,  Fumito ISAKA ,  Yuji EGI

IPC: C23C16/455 ,  H01L21/02 ,  H01L29/786 ,  H10B12/00 ,  C23C16/40

CPC classification number: C23C16/45553 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/0262 ,  H01L29/7869 ,  H01L29/78642 ,  H10B12/33 ,  C23C16/40 ,  H01L29/045

Abstract: A novel method for forming a metal oxide is provided. The metal oxide is formed using a precursor with a high decomposition temperature while a substrate is heated to higher than or equal to 300° C. and lower than or equal to 500° C. In the formation, plasma treatment, microwave treatment, or heat treatment is preferably performed as impurity removal treatment in an atmosphere containing oxygen. The impurity removal treatment may be performed while irradiation with ultraviolet light is performed. The metal oxide is formed by alternate repetition of precursor introduction and oxidizer introduction. For example, the impurity removal treatment is preferably performed every time the precursor introduction is performed more than or equal to 5 times and less than or equal to 10 times.

公开(公告)号：US20230326955A1

公开(公告)日：2023-10-12

申请号：US18022304

申请日：2021-08-12

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Sachiaki TEZUKA ,  Haruyuki BABA ,  Yuji EGI ,  Yasuhiro JINBO ,  Yujiro SAKURADA ,  Takeshi AOKI

IPC: H01L21/20 ,  H01L21/3115

CPC classification number: H01L28/60 ,  H01L21/3115

Abstract: A semiconductor device with a small variation in characteristics is provided. In a manufacturing method of a semiconductor device including a capacitor with reduced leak current, a first conductor is formed; a second insulator is formed over the first conductor; a third insulator is formed over the second insulator; a second conductor is formed over the third insulator; a fourth insulator is deposited over the second conductor and the third insulator; by heat treatment, hydrogen contained in the third insulator diffuses into or is absorbed by the second insulator; the first conductor is one electrode of the capacitor; the second conductor is the other electrode of the capacitor; and each of the second insulator and the third insulator is a dielectric of the capacitor.

公开(公告)号：US20230047051A1

公开(公告)日：2023-02-16

申请号：US17979807

申请日：2022-11-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Naoki OKUNO ,  Tetsuya KAKEHATA ,  Hiroki KOMAGATA ,  Yuji EGI

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66

Abstract: A manufacturing method of a semiconductor device includes the forming a first oxide over a substrate; depositing a first insulator over the first oxide; forming an opening reaching the first oxide in the first insulator; depositing a first oxide film in contact with the first oxide and the first insulator in the opening; depositing a first insulating film over the first oxide film by a PEALD method; depositing a first conductive film over the first insulating film; and removing part of the first oxide film, part of the first insulating film, and part of the first conductive film until a top surface of the first insulator is exposed to form a second oxide, a second insulator, and a first conductor. The deposition of the first insulating film is performed while the substrate is heated to higher than or equal to 300°.

公开(公告)号：US20190139783A1

公开(公告)日：2019-05-09

申请号：US16093268

申请日：2017-04-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Kazutaka KURIKI ,  Yuji EGI ,  Noritaka ISHIHARA ,  Yusuke NONAKA ,  Yasumasa YAMANE ,  Ryo TOKUMARU ,  Daisuke MATSUBAYASHI

IPC: H01L21/4757 ,  H01L27/105 ,  H01L27/12 ,  H01L29/66 ,  H01L21/443 ,  H01L21/477 ,  H01L21/02 ,  H01L29/786 ,  H01J37/32

Abstract: A semiconductor device having high reliability is provided.A first conductor is formed, a first insulator is formed over the first conductor, a second insulator is formed over the first insulator, a third insulator is formed over the second insulator, microwave-excited plasma treatment is performed on the third insulator, an island-shaped first oxide semiconductor is formed over the third insulator and a second conductor and a third conductor are formed over the first oxide semiconductor, an oxide semiconductor film is formed over the first oxide semiconductor, the second conductor, and the third conductor, a first insulating film is formed over the oxide semiconductor film, a conductive film is formed over the first insulating film, a fourth insulator and a fourth conductor are formed by partly removing the first insulating film and the conductive film, a second insulating film is formed to cover the oxide semiconductor film, the fourth insulator, and the fourth conductor, a second oxide semiconductor and a fifth insulator are formed by partly removing the oxide semiconductor film and the second insulating film to expose a side surface of the first oxide semiconductor, a sixth insulator is formed in contact with the side surface of the first oxide semiconductor and a side surface of the second oxide semiconductor, a seventh insulator is formed in contact with the sixth insulator, and heat treatment is performed.

公开(公告)号：US20180350997A1

公开(公告)日：2018-12-06

申请号：US16044600

申请日：2018-07-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Mitsuhiro ICHIJO ,  Toshiya ENDO ,  Akihisa SHIMOMURA ,  Yuji EGI ,  Sachiaki TEZUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78648

Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.

公开(公告)号：US20170200828A1

公开(公告)日：2017-07-13

申请号：US15467288

申请日：2017-03-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuji EGI ,  Hideomi SUZAWA ,  Shinya SASAGAWA

IPC: H01L29/786 ,  H01L21/44 ,  H01L21/4757 ,  H01L29/66 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/04 ,  H01L21/02 ,  H01L21/465

CPC classification number: H01L29/7869 ,  H01L21/0206 ,  H01L21/02565 ,  H01L21/44 ,  H01L21/465 ,  H01L21/4757 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/14616 ,  H01L29/045 ,  H01L29/0684 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78693

Abstract: In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive layer and an interlayer insulating layer are stacked to cover the oxide semiconductor layer, the sidewall insulating layers, and the gate electrode layer. Then, parts of the interlayer insulating layer and the conductive layer over the gate electrode layer are removed by a chemical mechanical polishing method, so that a source electrode layer and a drain electrode layer are formed. Before formation of the gate insulating layer, cleaning treatment is performed on the oxide semiconductor layer.

公开(公告)号：US20150137124A1

公开(公告)日：2015-05-21

申请号：US14609814

申请日：2015-01-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuji EGI ,  Hideomi SUZAWA ,  Shinya SASAGAWA

IPC: H01L29/786 ,  H01L29/06

CPC classification number: H01L29/7869 ,  H01L21/0206 ,  H01L21/02565 ,  H01L21/44 ,  H01L21/465 ,  H01L21/4757 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/14616 ,  H01L29/045 ,  H01L29/0684 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78693

Abstract: In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive layer and an interlayer insulating layer are stacked to cover the oxide semiconductor layer, the sidewall insulating layers, and the gate electrode layer. Then, parts of the interlayer insulating layer and the conductive layer over the gate electrode layer are removed by a chemical mechanical polishing method, so that a source electrode layer and a drain electrode layer are formed. Before formation of the gate insulating layer, cleaning treatment is performed on the oxide semiconductor layer.

Abstract translation: 在包括其中设置有侧壁绝缘层的侧表面上的氧化物半导体层，栅极绝缘层和栅电极层的晶体管的半导体器件中，依次层叠源电极层和漏电极层 提供与氧化物半导体层和侧壁绝缘层接触。 在制造半导体器件的方法中，层叠导电层和层间绝缘层以覆盖氧化物半导体层，侧壁绝缘层和栅极电极层。 然后，通过化学机械抛光方法去除层间绝缘层和栅电极层上的导电层的部分，从而形成源电极层和漏电极层。 在形成栅绝缘层之前，对氧化物半导体层进行清洗处理。

公开(公告)号：US20130137213A1

公开(公告)日：2013-05-30

申请号：US13677663

申请日：2012-11-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuji EGI ,  Hideomi SUZAWA ,  Shinya SASAGAWA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/0206 ,  H01L21/02565 ,  H01L21/44 ,  H01L21/465 ,  H01L21/4757 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/14616 ,  H01L29/045 ,  H01L29/0684 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78693

Abstract: In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive layer and an interlayer insulating layer are stacked to cover the oxide semiconductor layer, the sidewall insulating layers, and the gate electrode layer. Then, parts of the interlayer insulating layer and the conductive layer over the gate electrode layer are removed by a chemical mechanical polishing method, so that a source electrode layer and a drain electrode layer are formed. Before formation of the gate insulating layer, cleaning treatment is performed on the oxide semiconductor layer.