公开(公告)号：US08889496B2

公开(公告)日：2014-11-18

申请号：US13917012

申请日：2013-06-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masashi Tsubuku ,  Shuhei Yoshitomi ,  Takahiro Tsuji ,  Miyuki Hosoba ,  Junichiro Sakata ,  Hiroyuki Tomatsu ,  Masahiko Hayakawa

IPC: H01L21/00 ,  H01L21/84 ,  H01L21/335 ,  H01L29/66 ,  H01L29/786 ,  H01L21/02

CPC classification number: H01L27/1262 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02631 ,  H01L21/02667 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/7869

Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

Abstract translation: 本发明的目的是提供一种包括氧化物半导体膜的薄膜晶体管的结构的制造方法，其中形成沟道的阈值电压为正且尽可能接近0V。 形成保护绝缘层以覆盖包括通过第一热处理脱水或脱氢的氧化物半导体层的薄膜晶体管，以及在比第一热处理低的温度下进行第二热处理，其中， 重复多次温度的降低，由此，在不影响通道长度的情况下，包含氧化物半导体层的薄膜晶体管，其中形成沟道的阈值电压为正且尽可能接近0V，可以 制造。

公开(公告)号：US11855194B2

公开(公告)日：2023-12-26

申请号：US17500149

申请日：2021-10-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Miyuki Hosoba ,  Kosei Noda ,  Hiroki Ohara ,  Toshinari Sasaki ,  Junichiro Sakata

IPC: H01L29/786 ,  H01L21/477 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/66969 ,  H01L21/477 ,  H01L29/7869 ,  H01L27/1225

Abstract: A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region is an oxide semiconductor layer, heat treatment which reduces impurities such as moisture to improve the purity of the oxide semiconductor layer and oxidize the oxide semiconductor layer (heat treatment for dehydration or dehydrogenation) is performed. Not only impurities such as moisture in the oxide semiconductor layer but also those existing in a gate insulating layer are reduced, and impurities such as moisture existing in interfaces between the oxide semiconductor layer and films provided over and under and in contact with the oxide semiconductor layer are reduced.

公开(公告)号：US11695019B2

公开(公告)日：2023-07-04

申请号：US17105801

申请日：2020-11-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

IPC: H01L27/14 ,  H01L27/12 ,  G02F1/1345 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: H01L27/124 ,  G02F1/1368 ,  G02F1/13454 ,  G02F1/134309 ,  H01L27/1225 ,  H01L27/1255 ,  G02F2202/10

Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

公开(公告)号：US11637130B2

公开(公告)日：2023-04-25

申请号：US17573792

申请日：2022-01-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro Sakata ,  Toshinari Sasaki ,  Miyuki Hosoba

IPC: H01L21/02 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/24

Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

公开(公告)号：US10141343B2

公开(公告)日：2018-11-27

申请号：US15480560

申请日：2017-04-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunichi Ito ,  Toshinari Sasaki ,  Miyuki Hosoba ,  Junichiro Sakata

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H01L29/66

Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.

公开(公告)号：US09837441B2

公开(公告)日：2017-12-05

申请号：US15096663

申请日：2016-04-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro Sakata ,  Toshinari Sasaki ,  Miyuki Hosoba

IPC: H01L21/00 ,  H01L21/16 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L27/1225 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

公开(公告)号：US09647137B2

公开(公告)日：2017-05-09

申请号：US14822995

申请日：2015-08-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunichi Ito ,  Toshinari Sasaki ,  Miyuki Hosoba ,  Junichiro Sakata

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  G09G3/20

CPC classification number: H01L27/1225 ,  G09G3/20 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/247 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.

公开(公告)号：US09461181B2

公开(公告)日：2016-10-04

申请号：US14805599

申请日：2015-07-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Miyuki Hosoba ,  Junichiro Sakata ,  Hiroki Ohara ,  Shunpei Yamazaki

IPC: H01L21/00 ,  H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L29/66 ,  H01L21/324

CPC classification number: H01L29/78696 ,  G02F1/133528 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/133302 ,  G02F2001/133531 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L21/02107 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/02672 ,  H01L21/324 ,  H01L21/477 ,  H01L21/67115 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/66969 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to −40° C., still preferably lower than or equal to −50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.

公开(公告)号：US09123751B2

公开(公告)日：2015-09-01

申请号：US14287494

申请日：2014-05-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunichi Ito ,  Miyuki Hosoba ,  Hideomi Suzawa ,  Shinya Sasagawa ,  Taiga Muraoka

IPC: H01L21/00 ,  H01L21/84 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/7869

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.

Abstract translation: 目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。 在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜 光透过该掩模以具有多个强度。 在蚀刻步骤中，通过使用蚀刻气体的干蚀刻进行第一蚀刻步骤，并且通过使用蚀刻剂的湿蚀刻进行第二蚀刻步骤。

公开(公告)号：US08980685B2

公开(公告)日：2015-03-17

申请号：US14191853

申请日：2014-02-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideomi Suzawa ,  Shinya Sasagawa ,  Taiga Muraoka ,  Shunichi Ito ,  Miyuki Hosoba

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/66742 ,  H01L29/78621 ,  H01L29/7869

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.

Abstract translation: 本发明的目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在包括通道蚀刻的半导体器件的制造方法中 倒置交错薄膜晶体管，氧化物半导体膜和导电膜使用掩模层进行蚀刻，该掩模层使用作为透光的多色调掩模形成，该透光掩模通过该曝光掩模透射，以便具有多个 强度 在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。