INTEGRATED ELECTRONIC DEVICE INCLUDING A TEMPERATURE TRANSDUCER
    23.
    发明申请
    INTEGRATED ELECTRONIC DEVICE INCLUDING A TEMPERATURE TRANSDUCER 有权
    集成电子设备,包括温度传感器

    公开(公告)号:US20160313755A1

    公开(公告)日:2016-10-27

    申请号:US14970999

    申请日:2015-12-16

    CPC classification number: G05F5/00 G01K7/01

    Abstract: An integrated electronic device includes an electronic component and a temperature transducer. The temperature transducer is electrically arranged between a control terminal and a conduction terminal of the electronic component and includes a first diode. The first diode has a bulk resistance of at least 1Ω.

    Abstract translation: 集成电子设备包括电子部件和温度传感器。 温度传感器电气地布置在电子部件的控制端子和导电端子之间,并且包括第一二极管。 第一个二极管的体电阻至少为1Ω。

    ELECTRICAL PROTECTION DEVICE AND METHOD OF PROTECTING AN ELECTRONIC DEVICE
    24.
    发明申请
    ELECTRICAL PROTECTION DEVICE AND METHOD OF PROTECTING AN ELECTRONIC DEVICE 审中-公开
    电气保护装置和保护电子装置的方法

    公开(公告)号:US20160268796A1

    公开(公告)日:2016-09-15

    申请号:US14957430

    申请日:2015-12-02

    CPC classification number: H02H3/08 B62M6/90 H02H9/025 H03K2217/0018

    Abstract: An electrical protection device including an input line, an output terminal, and a power transistor coupled between the input line and the output terminal A sensing transistor is connected between the input line and the output terminal and has a body terminal. A control stage is coupled to respective control terminals of the power transistor and of the sensing transistor and is configured to limit a first current of the power transistor to a protection value. A body-driving stage is coupled to the body terminal and is configured to bias the body terminal of the sensing transistor as a function of an operating condition of the power transistor.

    Abstract translation: 耦合在输入线和输出端A感测晶体管之间的输入线,输出端和功率晶体管的电气保护装置连接在输入线和输出端之间,并具有主体端子。 控制级耦合到功率晶体管和感测晶体管的相应控制端,并被配置为将功率晶体管的第一电流限制到保护值。 身体驱动级耦合到身体终端,并且被配置为根据功率晶体管的操作条件来偏置感测晶体管的主体端子。

    IGBT TRANSISTOR WITH PROTECTION AGAINST PARASITIC COMPONENT ACTIVATION AND MANUFACTURING PROCESS THEREOF
    25.
    发明申请
    IGBT TRANSISTOR WITH PROTECTION AGAINST PARASITIC COMPONENT ACTIVATION AND MANUFACTURING PROCESS THEREOF 有权
    具有防止PARASITIC分量激活的保护的IGBT晶体管及其制造工艺

    公开(公告)号:US20140134807A1

    公开(公告)日:2014-05-15

    申请号:US14162200

    申请日:2014-01-23

    CPC classification number: H01L29/66333 H01L29/1095 H01L29/66325 H01L29/7395

    Abstract: An IGBT transistor includes a drift region, at least one body region housed in the drift region and having a first type of conductivity, and a conduction region, which crosses the body region in a direction perpendicular to a surface of the drift region and has the first type of conductivity and a lower resistance than the body region. The conduction region includes a plurality of implant regions, arranged at respective depths from the surface of the drift region.

    Abstract translation: IGBT晶体管包括漂移区域,容纳在漂移区域中并且具有第一类型的导电性的至少一个体区和在垂直于漂移区域的表面的方向上穿过身体区域的导电区域,并且具有 第一类导电性和比身体区域更低的电阻。 导电区域包括多个植入区域,其布置在距漂移区域的表面相应的深度处。

    DETECTOR OF GRAVITATIONAL WAVES AND METHOD OF DETECTING GRAVITATIONAL WAVES
    26.
    发明申请
    DETECTOR OF GRAVITATIONAL WAVES AND METHOD OF DETECTING GRAVITATIONAL WAVES 审中-公开
    雷射波检测器和检测波形波的方法

    公开(公告)号:US20140096606A1

    公开(公告)日:2014-04-10

    申请号:US14041180

    申请日:2013-09-30

    CPC classification number: G01V7/08 G01V7/00 G01V7/04

    Abstract: A semiconductor detector of gravitational waves of a first frequency may include an oscillator having a metal coated oscillating member over a metal coated semiconductor substrate to be subjected to a Casimir attraction force towards the semiconductor substrate. The oscillator may be configured to exert a force to counterbalance the Casimir attraction force causing the oscillating member oscillates with a main harmonic resonance frequency equal to the first frequency. A displacement sensor may be coupled to the substrate and oscillating member and configured to sense oscillations and to generate corresponding sense signals. A pass-band filter may be tuned to the main harmonic resonance frequency and configured to generate band-pass replica signals of the sense signals, and an airtight package may be configured to keep a vacuum between the oscillating member and the semiconductor substrate. An array of semiconductor detectors and a method of detecting gravitational waves are also disclosed.

    Abstract translation: 第一频率的重力波的半导体检测器可以包括在金属涂覆的半导体衬底上具有金属涂覆的振荡元件的振荡器,以经受对半导体衬底的卡西米尔吸引力。 振荡器可以被配置为施加力以平衡卡西米尔吸引力,导致振荡部件以等于第一频率的主谐波谐振频率振荡。 位移传感器可以耦合到衬底和振荡构件并且被配置为感测振荡并产生相应的感测信号。 可以将通带滤波器调谐到主谐波谐振频率并被配置为产生感测信号的带通复制信号,并且气密封装可以被配置为在振荡构件和半导体衬底之间保持真空。 还公开了一种半导体检测器阵列和一种检测引力波的方法。

    INTEGRATED VERTICAL TRENCH MOS TRANSISTOR
    27.
    发明申请
    INTEGRATED VERTICAL TRENCH MOS TRANSISTOR 审中-公开
    集成垂直三通MOS晶体管

    公开(公告)号:US20140084360A1

    公开(公告)日:2014-03-27

    申请号:US14028364

    申请日:2013-09-16

    Abstract: A VTMOS transistor in semiconductor material of a first type of conductivity includes a body region of a second type of conductivity and a source region of the first type of conductivity. A gate region extends into the main surface through the body region and is insulated from the semiconductor material. A region of the gate region extends onto the main surface is insulated from the rest of the gate region. An anode region of the first type of conductivity is formed into said insulated region, and a cathode region of the second type of conductivity is formed into said insulated region in contact with the anode region; the anode region and the cathode region define a thermal diode electrically insulated from the chip.

    Abstract translation: 第一导电类型的半导体材料中的VTMOS晶体管包括第二导电类型的体区和第一类导电性的源区。 栅极区域通过主体区域延伸到主表面并与半导体材料绝缘。 延伸到主表面上的栅极区域的区域与栅极区域的其余部分绝缘。 第一导电类型的阳极区域形成在所述绝缘区域中,并且第二导电类型的阴极区域形成为与阳极区域接触的所述绝缘区域; 阳极区域和阴极区域限定与芯片电绝缘的热二极管。

    Trench-gate field effect transistor with improved electrical performances and corresponding manufacturing process

    公开(公告)号:US12027620B2

    公开(公告)日:2024-07-02

    申请号:US18348990

    申请日:2023-07-07

    CPC classification number: H01L29/7813 H01L29/66734

    Abstract: A field effect transistor has a semiconductor layer with a top surface extending in a horizontal plane, and an active area defined in which are trench gate regions, which extend in depth with respect to the top surface and have an insulating coating layer and a conductive inner layer, and source regions, adjacent to the trench gate regions so as to form a conductive channel extending vertically. The trench gate regions have a plurality of first gate regions, which extend in length in the form of stripes through the active area along a first direction of the horizontal plane, and moreover a plurality of second gate regions, which extend in length in the form of stripes through the same active area along a second direction of the horizontal plane, orthogonal to, and crossing, the first gate regions. In particular, the first gate regions and second gate regions cross in the active area, joining with a non-zero curvature radius.

    High-voltage capacitor, system including the capacitor and method for manufacturing the capacitor

    公开(公告)号:US11574996B2

    公开(公告)日:2023-02-07

    申请号:US17170550

    申请日:2021-02-08

    Abstract: In various embodiments, the present disclosure provides capacitors and methods of forming capacitors. In one embodiment, a capacitor includes a substrate, a first electrode on the substrate, a second electrode, and a first dielectric layer. A portion of the first electrode is exposed in a contact region. The first dielectric layer includes a first dielectric region between the first electrode and the second electrode, and a second dielectric region between the first dielectric region and the contact region. The second dielectric region is contiguous to the first dielectric region, and a surface of the second dielectric region defines a surface path between the first electrode and the contact region. The second dielectric region has a plurality of grooves that increase a spatial extension of said surface path.

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