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公开(公告)号:US10964791B2
公开(公告)日:2021-03-30
申请号:US16014496
申请日:2018-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Inchan Hwang , Heonjong Shin , Sunghun Jung , Doohyun Lee , Hwichan Jun , Hakyoon Ahn
IPC: H01L29/417 , H01L29/423 , H01L21/285 , H01L29/06 , H01L27/092 , H01L21/8238 , H01L29/165 , H01L29/45 , H01L29/08 , H01L29/78 , H01L29/66
Abstract: A semiconductor device is disclosed. The semiconductor device may include a substrate including a first active pattern, the first active pattern vertically protruding from a top surface of the substrate, a first source/drain pattern filling a first recess, which is formed in an upper portion of the first active pattern, a first metal silicide layer on the first source/drain pattern, the first metal silicide layer including a first portion and a second portion, which are located on a first surface of the first source/drain pattern, and a first contact in contact with the second portion of the first metal silicide layer. A thickness of the first portion may be different from a thickness of the second portion.
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公开(公告)号:US10923475B2
公开(公告)日:2021-02-16
申请号:US16391757
申请日:2019-04-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Heonjong Shin , Sunghun Jung , Minchan Gwak , Yongsik Jeong , Sangwon Jee , Sora You , Doohyun Lee
IPC: H01L27/092 , H01L29/78 , H01L29/66 , H01L21/8238 , H01L23/522 , H01L21/768 , H01L29/417
Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.
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公开(公告)号:US09576613B2
公开(公告)日:2017-02-21
申请号:US14571634
申请日:2014-12-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Steve Sunhom Paak , Kangwook Park , Heonjong Shin , Sunil Yu , Jongmil Youn , Hyungsoon Jang
CPC classification number: G11C5/06 , G11C5/02 , G11C5/025 , G11C8/14 , G11C29/1201 , G11C29/48 , G11C2029/5602
Abstract: A semiconductor device may include a semiconductor substrate; a test circuit array region; a pad region on the semiconductor substrate and at at least a first side of the test circuit array region and outside of the test circuit array region, transistors arranged in the test circuit array region in a first direction and a second direction perpendicular to the first direction, source lines spaced apart from each other in the second direction, each of the source lines extending in the first direction and electrically connected to corresponding source electrodes of the transistors, and drain lines spaced apart from each other in the second direction, each of the drain lines extending in the first direction and electrically connected to drain electrodes of the transistors.
Abstract translation: 半导体器件可以包括半导体衬底; 测试电路阵列区域; 半导体衬底上的焊盘区域和测试电路阵列区域的至少第一侧以及测试电路阵列区域的外部,在第一方向和垂直于第一方向的第二方向上布置在测试电路阵列区域中的晶体管 在第二方向上彼此间隔开的源极线,每个源极线在第一方向上延伸并且电连接到晶体管的相应源电极,以及在第二方向彼此间隔开的漏极线, 漏极线在第一方向上延伸并电连接到晶体管的漏电极。
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公开(公告)号:US20160343709A1
公开(公告)日:2016-11-24
申请号:US15159464
申请日:2016-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungmin Kim , Jisu Kang , Jaehyun Park , Heonjong Shin , Yuri Lee
IPC: H01L27/088 , H01L29/10 , H01L29/06 , H01L29/78 , H01L29/417
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/823481 , H01L27/088 , H01L29/0653 , H01L29/1037 , H01L29/41791 , H01L29/785
Abstract: A semiconductor device includes a first active region and a second active region, which are disposed in a semiconductor substrate and have side surfaces facing each other, an isolation pattern disposed between the first and second active regions, a semiconductor extension layer disposed between the first and second active regions, a first source/drain semiconductor layer disposed on the first active region, and a second source/drain semiconductor layer disposed on the second active region. The facing side surfaces of the first and second active regions are closer to the semiconductor extension layer than the isolation pattern.
Abstract translation: 半导体器件包括第一有源区和第二有源区,它们设置在半导体衬底中并且具有彼此面对的侧表面,设置在第一和第二有源区之间的隔离图案,设置在第一和第二有源区之间的半导体延伸层, 第二有源区,设置在第一有源区上的第一源/漏半导体层和设置在第二有源区上的第二源/漏半导体层。 第一和第二有源区的面对侧表面比隔离图案更靠近半导体延伸层。
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