公开(公告)号：US11978775B2

公开(公告)日：2024-05-07

申请号：US17841873

申请日：2022-06-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doohyun Lee ,  Hyun-Seung Song ,  Yeongchang Roh ,  Heonjong Shin ,  Sora You ,  Yongsik Jeong

IPC: H01L29/417 ,  H01L21/768 ,  H01L23/532 ,  H01L23/535 ,  H01L29/08 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L29/45

CPC classification number: H01L29/41775 ,  H01L23/53209 ,  H01L23/535 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/42376 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/76897 ,  H01L29/456

Abstract: A semiconductor device comprising a gate electrode on a substrate, a source/drain pattern on the substrate on a side of the gate electrode, and a gate contact plug on the gate electrode are disclosed. The gate contact plug may include a first gate contact segment, and a second gate contact segment that extends in a vertical direction from a top surface of the first gate contact segment. An upper width of the first gate contact segment may be greater than a lower width of the second gate contact segment.

公开(公告)号：US11705454B2

公开(公告)日：2023-07-18

申请号：US17582357

申请日：2022-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heonjong Shin ,  Sunghun Jung ,  Minchan Gwak ,  Yongsik Jeong ,  Sangwon Jee ,  Sora You ,  Doohyun Lee

IPC: H01L21/768 ,  H01L23/485 ,  H01L23/528 ,  H01L29/417 ,  H01L27/02 ,  H01L23/48 ,  H01L23/522 ,  H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L21/823871 ,  H01L23/5226 ,  H01L29/41775 ,  H01L29/6681 ,  H01L29/785 ,  H01L2029/7858

Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.

公开(公告)号：US10923475B2

公开(公告)日：2021-02-16

申请号：US16391757

申请日：2019-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heonjong Shin ,  Sunghun Jung ,  Minchan Gwak ,  Yongsik Jeong ,  Sangwon Jee ,  Sora You ,  Doohyun Lee

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L23/522 ,  H01L21/768 ,  H01L29/417

Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.

公开(公告)号：US20240170372A1

公开(公告)日：2024-05-23

申请号：US18347765

申请日：2023-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyoungwoo LEE ,  Yunsuk Nam ,  Jinkyu Kim ,  Sora You ,  Sungmoon Lee ,  Seungmin Cha

IPC: H01L23/48 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include first active patterns adjacent to each other on a substrate, first source/drain patterns respectively on the first active patterns and adjacent to each other, a first division structure and a second division structure crossing the first active patterns and arranged on the substrate such that adjacent ones of the first source/drain patterns are interposed between the first division structure and the second division structure, a first penetration via between adjacent ones of the first source/drain patterns, a first power line on the first penetration via and electrically connected to the first penetration via, a power delivery network layer on a bottom surface of the substrate, and a first lower penetration via between the power delivery network layer and the first penetration via.

公开(公告)号：US20240128161A1

公开(公告)日：2024-04-18

申请号：US18379083

申请日：2023-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungmoon Lee ,  Sangcheol Na ,  Sora You ,  Kyoungwoo Lee ,  Minchan Gwak ,  Youngwoo Kim ,  Jinkyu Kim ,  Seungmin Cha

IPC: H01L23/48 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/775 ,  H01L29/78696

Abstract: Provided is an integrated circuit device including a substrate, a plurality of semiconductor patterns on a first surface of the substrate, a gate electrode extending in a first direction and surrounding the semiconductor patterns, a source/drain region disposed on one side of the gate electrode, a vertical power wiring layer extending in a second direction, a liner structure including a first liner and a second liner, the first liner disposed on a lower portion of a sidewall of the vertical power wiring layer and including a first insulating material, and the second liner disposed on an upper portion of the sidewall of the vertical power wiring layer and including a second insulating material, a first contact disposed on the source/drain region and the vertical power wiring layer, and a back wiring structure disposed on a second surface of the substrate and electrically connected to the vertical power wiring layer.

公开(公告)号：US20230411471A1

公开(公告)日：2023-12-21

申请号：US18295867

申请日：2023-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmin Cha ,  Minchan Gwak ,  Donghoon Hwang ,  Sora You ,  Sungmoon Lee

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/775 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L29/41766 ,  H01L27/088 ,  H01L29/775 ,  H01L29/42392 ,  H01L29/0673

Abstract: A semiconductor device includes first and second active regions on a substrate and extending in a first direction, first and second gate structures on the first and second active regions, respectively, the first and second gate structures extending in a second direction and being spaced apart from each other in the second direction, first and second source/drain regions on the first and second active regions, respectively, and spaced apart from the first and second gate structures, first and second contact plugs on the first and second source/drain regions and respectively connected to the first and second source/drain regions, and a vertical buried structure between the first and second gate structures and between the first and second source/drain regions. The vertical buried structure may include first and second side surfaces, and the first contact plug contacts the first side surface of the vertical buried structure.

公开(公告)号：US11264386B2

公开(公告)日：2022-03-01

申请号：US17038435

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： HeonJong Shin ,  Sunghun Jung ,  Minchan Gwak ,  Yongsik Jeong ,  Sangwon Jee ,  Sora You ,  Doohyun Lee

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L23/522 ,  H01L21/768 ,  H01L23/485 ,  H01L29/417 ,  H01L29/66

Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.