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公开(公告)号:US10985463B2
公开(公告)日:2021-04-20
申请号:US16939503
申请日:2020-07-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihoon Kim , Jiyong Kim , Jongin Lee , Yeonjeong Kim , Hyoseok Na
Abstract: According to various embodiments, an electronic device comprises: a first plate; a second plate facing the opposite direction of the first plate; a housing including a lateral member for encompassing the space between the first plate and the second plate; and an antenna structure, wherein the antenna structure includes: a plurality of insulating layers arranged in a stacked manner so as to be parallel to the first plate; a loop antenna array formed by the insulating layers and/or by the peripheries of the insulating layers; and a wireless communication circuit electrically connected to loop antennas, and configured to transmit and receive a first signal having a first frequency of a range of 3 GHz to 100 GHz.
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公开(公告)号:US10720950B2
公开(公告)日:2020-07-21
申请号:US16419172
申请日:2019-05-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongjun An , Jihoon Kim , Youngmin Lee
Abstract: Provided is an electronic device includes an interface for connection to an external device; and a processor electrically connected to the interface, wherein the at least one processor is configured to: set a first radio frequency (RF) signal port of a first chipset to operate in RF signal transmission mode, and set a second RF signal port of a second chipset to operate in RF signal reception mode; obtain an error of transmission performance of the first RF signal port based on a comparison between a designated transmission reference that is input to the first RF signal port and a characteristic of a first intermediate frequency (IF) signal that is output via the second RF signal port; obtain a first compensation value to enable the transmission performance of the first RF signal port to converge to the transmission reference, on the basis of the error of the transmission performance; and store at least one of the error of the transmission performance and the first compensation value in the first chipset via the interface.
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公开(公告)号:US20180342519A1
公开(公告)日:2018-11-29
申请号:US15814824
申请日:2017-11-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihoon Kim , Wonchul Lee
IPC: H01L27/108 , H01L49/02
CPC classification number: H01L27/10852 , H01L27/10823 , H01L27/10855 , H01L27/10876 , H01L27/10894 , H01L28/75 , H01L28/87 , H01L28/91
Abstract: A semiconductor device includes a substrate including a cell region and peripheral region and bottom electrodes on the substrate. The bottom electrodes are arranged in a first row and a second row each extending in a first direction. The first row and the second row are adjacent to each other in a second direction perpendicular to the first direction. The bottom electrodes in the first row include an outermost bottom electrode and a next outermost bottom electrode that are separated by a first distance in the first direction. The bottom electrodes in the second row include an outermost bottom electrode and a next outermost bottom electrode that are separated by a second distance in the first direction. The outermost bottom electrode in the first row is on the peripheral region of the substrate. The outermost bottom electrode in the second row is on the cell region of the substrate.
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公开(公告)号:USD784406S1
公开(公告)日:2017-04-18
申请号:US29524510
申请日:2015-04-21
Applicant: Samsung Electronics Co., Ltd.
Designer: Jihoon Kim , Jin-Gyu Seo
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公开(公告)号:USD761766S1
公开(公告)日:2016-07-19
申请号:US29524921
申请日:2015-04-24
Applicant: Samsung Electronics Co., Ltd.
Designer: Solee Kim , Jonghyun Shin , Jihoon Kim , Sungwoo Sul , Jinho Yim
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公开(公告)号:US12266200B2
公开(公告)日:2025-04-01
申请号:US17875605
申请日:2022-07-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihoon Kim , Gwanyong Park , Jeongwan Park , Donghyuk Lee
IPC: G06F3/04883 , G06V30/19 , G06V30/22 , G06V30/32
Abstract: According to certain embodiments, an electronic device may include a display, a memory, and a processor operatively connected to the display and the memory. The processor may be configured to, while receiving user's touch input in a handwriting area of the display, the user's touch input comprising successive input stokes: output the successive input strokes in the handwriting area on the display; determine a first stroke group including some of the successive input strokes, to determine a first character corresponding to the first stroke group, to output the first stroke group in an output area adjacent to the handwriting area on the display, to determine a second stroke group including at least another input stroke received after the some of the successive input strokes, to determine a second character corresponding to the second stroke group, and to output the second stroke group in the output area, move the first stroke group to on one side of the second stroke group on the display.
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公开(公告)号:US12132019B2
公开(公告)日:2024-10-29
申请号:US18151622
申请日:2023-01-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyuekjae Lee , Jongho Lee , Jihoon Kim , Taehun Kim , Sangcheon Park , Jinkyeong Seol , Sanghoon Lee
IPC: H01L21/56 , H01L23/00 , H01L25/00 , H01L25/065 , H01L25/18
CPC classification number: H01L24/06 , H01L21/561 , H01L24/05 , H01L24/08 , H01L24/13 , H01L24/32 , H01L24/92 , H01L24/94 , H01L24/96 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/05025 , H01L2224/05073 , H01L2224/05562 , H01L2224/05564 , H01L2224/06182 , H01L2224/08121 , H01L2224/08145 , H01L2224/08148 , H01L2224/08225 , H01L2224/13024 , H01L2224/32145 , H01L2224/32225 , H01L2224/80895 , H01L2224/83099 , H01L2224/8389 , H01L2224/92142 , H01L2225/06541 , H01L2225/06548
Abstract: A semiconductor package includes a first connection structure, a first semiconductor chip on an upper surface of the first connection structure, a first molding layer on the upper surface of the first connection structure and surrounding the first semiconductor chip, a first bond pad on the first semiconductor chip, a first bond insulation layer on the first semiconductor chip and the first molding layer and surrounding the first bond pad, a second bond pad directly contacting the first bond pad, a second bond insulation layer surrounding the second bond pad; and a second semiconductor chip on the second bond pad and the second bond insulation layer.
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公开(公告)号:US12119542B2
公开(公告)日:2024-10-15
申请号:US17297868
申请日:2019-12-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihoon Kim , Hyoseok Na , Jongin Lee
Abstract: An electronic device according to an embodiment disclosed herein includes a housing and a plurality of antenna modules disposed adjacent to an edge of the housing, wherein the plurality of antenna modules may include: a first antenna array including a printed circuit board, which includes a first face, a second face facing away from the first face, and a side face disposed between the first face and the second face, and a plurality of first antenna elements extending from a point on the first face to a point on the second face through the side face; and a second antenna array including a plurality of second antenna elements disposed on the first face. In addition, various embodiments conceived through the specification are possible.
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公开(公告)号:US12080239B2
公开(公告)日:2024-09-03
申请号:US18237515
申请日:2023-08-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyunghoon Chung , Jihoon Kim , Yongsoo Lee , Jihyun Lee , Minje Hyun
IPC: G09G3/3233 , G09G3/36
CPC classification number: G09G3/3233 , G09G3/3648 , G09G2300/0452 , G09G2300/0842 , G09G2310/0202 , G09G2310/0243 , G09G2310/08 , G09G2330/021
Abstract: A display device includes: a charge sharing controller to generate the plurality of group switch control signals based on first bits of (K−1)th digital data groups and second bits of digital data groups. The (K−1)th digital data groups correspond to pixel values of a (K−1)th row of the display panel. The Kth data digital groups correspond to pixel values of a Kth row of the display panel. The charge sharing controller is configured to, with respect to each of the plurality of source line groups, activate each of the plurality of group switch control signals to perform the charge sharing in response to the first bits satisfying a first condition, and the first bits and the second bits satisfying a second condition. The first bits and the second bits are not compared to each other to output a count value.
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30.
公开(公告)号:US20240273013A1
公开(公告)日:2024-08-15
申请号:US18428332
申请日:2024-01-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangho Yi , Jihoon Kim , Chaehwan Yang , Jonghun Jeong , Gunbae Kim
IPC: G06F12/02
CPC classification number: G06F12/0223
Abstract: A computational storage system according to an aspect of the inventive concept includes a storage device including a storage controller, a buffer memory, and a non-volatile memory, a computing device configured to process data in response to a data processing request received from an external device and to generate first dump data in response to a first dump request received from the external device, and a volatile memory configured to store data used for data processing of the computing device, wherein the storage device is configured to store the first dump data in the nonvolatile memory in response to a storage request of the first dump data using a metadata access protocol received from the computing device.
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