公开(公告)号：US20150076493A1

公开(公告)日：2015-03-19

申请号：US14480900

申请日：2014-09-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshiyuki Kobayashi ,  Daisuke Matsubayashi

IPC: H01L29/10 ,  H01L29/66 ,  H01L21/283 ,  H01L29/786

CPC classification number: H01L29/1033 ,  H01L29/1054 ,  H01L29/66969 ,  H01L29/785 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a transistor having high field effect mobility. To provide a transistor having stable electrical characteristics. To provide a transistor having low off-state current (current in an off state). To provide a semiconductor device including the transistor. The semiconductor device includes a semiconductor; a source electrode and a drain electrode including regions in contact with a top surface and side surfaces of the semiconductor; a gate insulating film including a region in contact with the semiconductor; and a gate electrode including a region facing the semiconductor with the gate insulating film provided therebetween. A length of a region of the semiconductor, which is not in contact with the source and drain electrodes, is shorter than a length of a region of the semiconductor, which is in contact with the source and drain electrodes, in a channel width direction.

Abstract translation: 提供具有高场效应迁移率的晶体管。 提供具有稳定电特性的晶体管。 提供具有低截止电流（截止状态下的电流）的晶体管。 提供包括晶体管的半导体器件。 半导体器件包括半导体; 源电极和漏电极，包括与半导体的顶表面和侧表面接触的区域; 包括与半导体接触的区域的栅极绝缘膜; 以及栅电极，其包括面对半导体的区域，其间设置有栅极绝缘膜。 不与源极和漏极接触的半导体区域的长度比在沟道宽度方向上与源极和漏极接触的半导体的区域的长度短。

公开(公告)号：US20140361292A1

公开(公告)日：2014-12-11

申请号：US14293484

申请日：2014-06-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Shinpei Matsuda ,  Daisuke Matsubayashi

IPC: H01L29/786

CPC classification number: H01L29/78648 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 μm or longer and 6.5 μm or shorter.

Abstract translation: 提供了包括具有优异的电特性（例如导通电流，场效应迁移率或频率特性）的晶体管或包括具有高可靠性的晶体管的半导体器件的半导体器件。 在其中氧化物半导体膜位于第一和第二栅电极之间的沟道蚀刻晶体管的沟道宽度方向上，第一和第二栅极通过第一和第二栅极绝缘膜中的开口部彼此连接。 此外，第一和第二栅电极在沟道宽度方向的横截面中包围氧化物半导体膜，第一栅极绝缘膜设置在第一栅极和氧化物半导体膜之间，第二栅极绝缘膜设置在第二栅极绝缘膜之间 第二栅电极和氧化物半导体膜。 此外，晶体管的沟道长度为0.5μm以上且6.5μm以下。

公开(公告)号：US20140339544A1

公开(公告)日：2014-11-20

申请号：US14277465

申请日：2014-05-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke Matsubayashi ,  Yoshiyuki Kobayashi ,  Shunpei Yamazaki ,  Shinpei Matsuda

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/785 ,  H01L29/7854 ,  H01L29/78696

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

Abstract translation: 可以抑制半导体装置小型化时变得更显着的电特性劣化的半导体装置。 半导体器件包括第一氧化物膜，第一氧化物膜上的氧化物半导体膜，与氧化物半导体膜接触的源电极和漏电极，氧化物半导体膜上的第二氧化物膜，源电极和 漏电极，第二氧化膜上的栅极绝缘膜，以及与栅极绝缘膜接触的栅电极。 氧化物半导体膜的顶端部在通道宽度方向观察时呈弯曲状。

公开(公告)号：US20140151691A1

公开(公告)日：2014-06-05

申请号：US14093648

申请日：2013-12-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Matsubayashi ,  Satoshi Shinohara ,  Wataru Sekine

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/4908 ,  H01L29/78612 ,  H01L29/78696

Abstract: A semiconductor device in which deterioration of electrical characteristics which becomes more noticeable as the transistor is miniaturized can be suppressed is provided. The semiconductor device includes an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over a substrate; a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor stack; a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating film. The first oxide semiconductor layer includes a first region. The gate insulating film includes a second region. When the thickness of the first region is TS1 and the thickness of the second region is TG1, TS1≧TG1.

Abstract translation: 提供了可以抑制由于晶体管小型化而变得更显着的电特性劣化的半导体器件。 半导体器件包括氧化物半导体堆叠，其中第一氧化物半导体层，第二氧化物半导体层和第三氧化物半导体层从衬底侧依次层叠在衬底上; 与氧化物半导体堆叠接触的源电极层和漏电极层; 氧化物半导体堆叠上的栅极绝缘膜，源极电极层和漏极电极层; 以及栅极绝缘膜上的栅极电极层。 第一氧化物半导体层包括第一区域。 栅极绝缘膜包括第二区域。 当第一区域的厚度为TS1且第二区域的厚度为TG1时，TS1≥TG1。

公开(公告)号：US11961917B2

公开(公告)日：2024-04-16

申请号：US17844767

申请日：2022-06-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya Hanaoka ,  Daisuke Matsubayashi ,  Yoshiyuki Kobayashi ,  Shunpei Yamazaki ,  Shinpei Matsuda

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/78696 ,  H01L29/785 ,  H01L29/7854

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US11824105B2

公开(公告)日：2023-11-21

申请号：US17227450

申请日：2021-04-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Hajime Tokunaga ,  Toshinari Sasaki ,  Keisuke Murayama ,  Daisuke Matsubayashi

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/51 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/66969 ,  H01L21/022 ,  H01L21/02263 ,  H01L27/1225 ,  H01L29/513 ,  H01L29/7869 ,  H01L29/78609

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

公开(公告)号：US11355645B2

公开(公告)日：2022-06-07

申请号：US17065635

申请日：2020-10-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Keisuke Murayama

IPC: H01L29/78 ,  H01L29/786

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

公开(公告)号：US11164871B2

公开(公告)日：2021-11-02

申请号：US16643073

申请日：2018-08-29

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takanori Matsuzaki ,  Yoshinobu Asami ,  Daisuke Matsubayashi ,  Tatsuya Onuki

IPC: H01L27/105 ,  H01L27/12 ,  H01L29/786

Abstract: A first transistor, a second transistor, a capacitor, and first to third conductors are included. The first transistor includes a first gate, a source, and a drain. The second transistor includes a second gate, a third gate over the second gate, first and second low-resistance regions, and an oxide sandwiched between the second gate and the third gate. The capacitor includes a first electrode, a second electrode, and an insulator sandwiched therebetween. The first low-resistance region overlaps with the first gate. The first conductor is electrically connected to the first gate and is connected to a bottom surface of the first low-resistance region. The capacitor overlaps with the first low-resistance region. The second conductor is electrically connected to the drain. The third conductor overlaps with the second conductor and is connected to the second conductor and a side surface of the second low-resistance region.

公开(公告)号：US11101386B2

公开(公告)日：2021-08-24

申请号：US16634493

申请日：2018-07-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Ryota Hodo ,  Daigo Ito ,  Hiroaki Honda ,  Satoru Okamoto

IPC: H01L29/786 ,  G11C11/4091 ,  H01L27/108 ,  H01L27/105 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/24 ,  H01L29/417

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes an oxide; a first conductor and a second conductor over the oxide; a third conductor over the oxide; a first insulator provided between the oxide and the third conductor and covering a side surface of the third conductor; a second insulator over the third conductor and the first insulator; a third insulator positioned over the first conductor and at a side surface of the second insulator; a fourth insulator positioned over the second conductor and at a side surface of the second insulator; a fourth conductor being in contact with a top surface and a side surface of the third insulator and electrically connected to the first conductor; and a fifth conductor being in contact with a top surface and a side surface of the fourth insulator and electrically connected to the second conductor. The first insulator is between the third insulator and the third conductor, and between the fourth insulator and the third conductor.

公开(公告)号：US11049974B2

公开(公告)日：2021-06-29

申请号：US16833918

申请日：2020-03-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Tetsuhiro Tanaka ,  Hirokazu Watanabe ,  Yuhei Sato ,  Yasumasa Yamane ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/45 ,  H01L29/66

Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.