公开(公告)号：US11380688B2

公开(公告)日：2022-07-05

申请号：US16478532

申请日：2018-01-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yuichi Sato ,  Ryota Hodo ,  Yuta Iida ,  Tomoaki Moriwaka

IPC: H01L27/108 ,  H01L21/02 ,  H01L21/311 ,  H01L21/321 ,  H01L23/532

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.

公开(公告)号：US11177176B2

公开(公告)日：2021-11-16

申请号：US16649890

申请日：2018-10-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Toshihiko Takeuchi ,  Hiromi Sawai ,  Ryota Hodo ,  Katsuaki Tochibayashi

IPC: H01L21/8234 ,  H01L29/786

Abstract: A semiconductor device that can have favorable electrical characteristics and can be highly integrated is provided.
The semiconductor device includes a first insulator; a second insulator over the first insulator; an oxide over the second insulator; a first conductor and a second conductor over the oxide; a third insulator over the oxide; a third conductor positioned over the third insulator and overlapping with the oxide; a fourth insulator in contact with the second insulator, a side surface of the oxide, a side surface of the first conductor, a top surface of the first conductor, a side surface of the second conductor, a top surface of the second conductor, and a side surface of the third insulator; and a fifth insulator in contact with a top surface of the third insulator and a top surface of the third conductor, and a top surface of the fourth insulator is in contact with the fifth insulator.

公开(公告)号：US11101386B2

公开(公告)日：2021-08-24

申请号：US16634493

申请日：2018-07-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Ryota Hodo ,  Daigo Ito ,  Hiroaki Honda ,  Satoru Okamoto

IPC: H01L29/786 ,  G11C11/4091 ,  H01L27/108 ,  H01L27/105 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/24 ,  H01L29/417

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes an oxide; a first conductor and a second conductor over the oxide; a third conductor over the oxide; a first insulator provided between the oxide and the third conductor and covering a side surface of the third conductor; a second insulator over the third conductor and the first insulator; a third insulator positioned over the first conductor and at a side surface of the second insulator; a fourth insulator positioned over the second conductor and at a side surface of the second insulator; a fourth conductor being in contact with a top surface and a side surface of the third insulator and electrically connected to the first conductor; and a fifth conductor being in contact with a top surface and a side surface of the fourth insulator and electrically connected to the second conductor. The first insulator is between the third insulator and the third conductor, and between the fourth insulator and the third conductor.

公开(公告)号：US10665613B2

公开(公告)日：2020-05-26

申请号：US16280792

申请日：2019-02-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Ryota Hodo ,  Motomu Kurata ,  Shinya Sasagawa ,  Satoru Okamoto ,  Shunpei Yamazaki

IPC: H01L23/532 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L21/467 ,  H01L21/463 ,  H01L21/768 ,  H01L21/02 ,  H01L23/522 ,  H01L29/778

Abstract: First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.

公开(公告)号：US10658389B2

公开(公告)日：2020-05-19

申请号：US15386017

申请日：2016-12-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Shinya Sasagawa ,  Ryota Hodo ,  Katsuaki Tochibayashi ,  Tomoaki Moriwaka ,  Jiro Nishida ,  Hidekazu Miyairi ,  Shunpei Yamazaki

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L23/522 ,  H01L27/13 ,  H01L21/84 ,  H01L21/822

Abstract: The semiconductor device includes a first layer including a first transistor, a second layer including a first insulating film over the first layer, a third layer including a second insulating film over the second layer, and a fourth layer including a second transistor over the third layer. A first conductive film electrically connects the first transistor and the second transistor to each other through an opening provided in the first insulating film. A second conductive film electrically connects the first transistor, the second transistor, and the first conductive film to one another through an opening provided in the second insulating film. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The width of a bottom surface of the second conductive film is 5 nm or less.

公开(公告)号：US20200035728A1

公开(公告)日：2020-01-30

申请号：US16592068

申请日：2019-10-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Ryota Hodo ,  Yuta Ilda

IPC: H01L27/146 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H01L21/768

Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.

公开(公告)号：US20150349127A1

公开(公告)日：2015-12-03

申请号：US14489074

申请日：2014-09-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Motomu Kurata ,  Shinya Sasagawa ,  Ryota Hodo ,  Katsuaki Tochibayashi ,  Tomoaki Moriwaka ,  Jiro Nishida ,  Hidekazu Miyairi ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L27/1207 ,  H01L21/8221 ,  H01L21/84 ,  H01L23/5226 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/13 ,  H01L29/66969 ,  H01L29/7869

Abstract: The semiconductor device includes a first layer including a first transistor, a second layer including a first insulating film over the first layer, a third layer including a second insulating film over the second layer, and a fourth layer including a second transistor over the third layer. A first conductive film electrically connects the first transistor and the second transistor to each other through an opening provided in the first insulating film. A second conductive film electrically connects the first transistor, the second transistor, and the first conductive film to one another through an opening provided in the second insulating film. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The width of a bottom surface of the second conductive film is 5 nm or less.

Abstract translation: 半导体器件包括第一层，第一层包括第一晶体管，第二层，包括第一层上的第一绝缘膜，第三层，包括第二层上的第二绝缘膜;以及第四层，包括第三层上的第二晶体管 。 第一导电膜通过设置在第一绝缘膜中的开口将第一晶体管和第二晶体管彼此电连接。 第二导电膜通过设置在第二绝缘膜中的开口将第一晶体管，第二晶体管和第一导电膜彼此电连接。 第一晶体管的沟道形成区域包括单晶半导体。 第二晶体管的沟道形成区包括氧化物半导体。 第二导电膜的底面的宽度为5nm以下。

公开(公告)号：US12278291B2

公开(公告)日：2025-04-15

申请号：US17296358

申请日：2019-11-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kentaro Sugaya ,  Ryota Hodo ,  Kenichiro Makino ,  Shuhei Nagatsuka

IPC: H01L29/786 ,  H01L21/308 ,  H01L27/12 ,  H01L29/66

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a plurality of transistors; each of the plurality of transistors includes a first insulator, a first oxide, a second oxide, a first conductor, a second conductor, a third oxide, a second insulator, and a third conductor; the third oxide included in one of the plurality of transistors and the third oxide included in another of the plurality of transistors, which is adjacent to the one of the plurality of transistors, are provided to be apart from each other in the channel width direction of the plurality of transistors; the second insulator included in one of the plurality of transistors includes a region continuous with the second insulator included in another of the plurality of transistors, which is adjacent to the one of the plurality of transistors; and the third conductor included in one of the plurality of transistors includes a region continuous with the third conductor included in another of the plurality of transistors, which is adjacent to the one of the plurality of transistors.

公开(公告)号：US12218247B2

公开(公告)日：2025-02-04

申请号：US17606830

申请日：2020-04-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Ryota Hodo ,  Tetsuya Kakehata ,  Shinya Sasagawa

IPC: H01L29/786 ,  H01L21/311 ,  H01L21/321 ,  H01L21/465 ,  H01L21/66 ,  H01L21/822 ,  H01L27/06 ,  H01L27/12 ,  H01L29/66 ,  H10B12/00 ,  H10B41/70

Abstract: A transistor with a high on-state current and a semiconductor device with high productivity are provided. Included are a first oxide, a second oxide, a third oxide, and a fourth oxide over a first insulator; a first conductor over the third oxide; a second conductor over the fourth oxide; a second insulator over the first conductor; a third insulator over the second conductor; a fifth oxide positioned over the second oxide and between the third oxide and the fourth oxide; a sixth oxide over the fifth oxide; a fourth insulator over the sixth oxide; a third conductor over the fourth insulator; and a fifth insulator over the first insulator to the third insulator. The fifth oxide includes a region in contact with the second oxide to the fourth oxide and the first insulator. The sixth oxide includes a region in contact with the fifth oxide, the first conductor, and the second conductor. The fourth insulator includes a region in contact with at least the sixth oxide, the third conductor, and the fifth insulator.

公开(公告)号：US11495601B2

公开(公告)日：2022-11-08

申请号：US17253239

申请日：2019-06-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Takanori Matsuzaki ,  Ryo Tokumaru ,  Ryota Hodo

IPC: H01L27/108 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, an electrode, and an interlayer film. The transistor includes a semiconductor layer, a gate, a source, and a drain; the transistor and the capacitor are placed to be embedded in the interlayer film. Below the semiconductor layer, one of the source and the drain is in contact with the electrode. Above the semiconductor layer, the other of the source and the drain is in contact with one electrode of the capacitor.