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公开(公告)号:US11430894B2
公开(公告)日:2022-08-30
申请号:US16710456
申请日:2019-12-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazuya Hanaoka , Daisuke Matsubayashi , Yoshiyuki Kobayashi , Shunpei Yamazaki , Shinpei Matsuda
IPC: H01L29/78 , H01L29/786 , H01L29/417
Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
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公开(公告)号:US10707238B2
公开(公告)日:2020-07-07
申请号:US16355913
申请日:2019-03-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Junichi Koezuka , Kenichi Okazaki , Yukinori Shima , Shinpei Matsuda , Haruyuki Baba , Ryunosuke Honda
IPC: H01L29/786 , H01L27/12 , H01L29/778 , H01L29/66 , H01L29/24
Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
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公开(公告)号:US10522688B2
公开(公告)日:2019-12-31
申请号:US15380502
申请日:2016-12-15
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kiyoshi Kato , Tomoaki Atsumi , Shunpei Yamazaki , Haruyuki Baba , Shinpei Matsuda
IPC: H01L29/786 , H01L27/088 , H01L27/12 , H01L27/108
Abstract: A semiconductor device capable of holding data for a long time is provided. The semiconductor device includes a first transistor, a second transistor, and a circuit. The first transistor includes a first gate and a second gate. The first transistor includes a first semiconductor in a channel formation region. The first gate and the second gate overlap with each other in a region with the first semiconductor provided therebetween. The second transistor includes a second semiconductor in a channel formation region. A first terminal of the second transistor is electrically connected to a gate of the second transistor and the second gate. A second terminal of the second transistor is electrically connected to the circuit. The circuit has a function of generating a negative potential. The second semiconductor has a wider bandgap than the first semiconductor.
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公开(公告)号:US10483365B2
公开(公告)日:2019-11-19
申请号:US15251382
申请日:2016-08-30
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Akio Suzuki , Shinpei Matsuda , Shunpei Yamazaki
IPC: H01L29/423 , H01L29/66 , H01L21/28 , H01L29/786 , H01L29/788 , H01L27/1156
Abstract: A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.
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公开(公告)号:US10475818B2
公开(公告)日:2019-11-12
申请号:US15494850
申请日:2017-04-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshinori Ando , Shinpei Matsuda , Yuki Hata
IPC: H01L27/12 , H01L29/786 , H01L27/105 , H01L29/423
Abstract: A semiconductor device capable of retaining data for a long time is provided. A first transistor and a second transistor having different electrical characteristics from those of the first transistor are provided over the same layer without an increase in the number of manufacturing steps.
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公开(公告)号:US10115741B2
公开(公告)日:2018-10-30
申请号:US15412256
申请日:2017-01-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shinpei Matsuda , Masayuki Sakakura , Shunpei Yamazaki
IPC: G11C11/24 , H01L27/12 , G11C11/418 , G11C11/419 , H01L27/105 , H01L29/786 , G11C11/403 , G11C29/06 , G11C29/44 , G11C29/50
Abstract: To provide a semiconductor device capable of retaining data for a long period. The semiconductor device includes a memory circuit and a retention circuit. The memory circuit includes a first transistor, and the retention circuit includes a second transistor. The memory circuit is configured to write data by turning on the first transistor and to retain the data by turning off the first transistor. The retention circuit is configured to supply a first potential at which the first transistor is turned off to a back gate of the first transistor by turning on the second transistor and to retain the first potential by turning off the second transistor. Transistors having different electrical characteristics are used as the first transistor and the second transistor.
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公开(公告)号:US09954003B2
公开(公告)日:2018-04-24
申请号:US15430746
申请日:2017-02-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shinpei Matsuda , Masayuki Sakakura , Yuki Hata , Shuhei Nagatsuka , Yuta Endo , Shunpei Yamazaki
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L27/1222 , H01L27/1225 , H01L27/1237 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: A semiconductor device with high design flexibility is provided. A first transistor and a second transistor having electrical characteristics different from those of the first transistor are provided over the same layer without significantly increasing the number of manufacturing steps. For example, semiconductor materials with different electron affinities are used for a semiconductor layer in which a channel of the first transistor is formed and a semiconductor layer in which a channel of the second transistor is formed. This allows the threshold voltages of the first transistor and the second transistor to differ from each other. Forming a gate electrode using a damascene process enables miniaturization and high density of the transistors. Furthermore, a highly-integrated semiconductor device is provided.
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公开(公告)号:US09728556B2
公开(公告)日:2017-08-08
申请号:US15296395
申请日:2016-10-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hiroyuki Miyake , Kenichi Okazaki , Masahiko Hayakawa , Shinpei Matsuda
IPC: H01L27/12 , G02F1/1343 , G02F1/1368
CPC classification number: H01L27/1225 , G02F1/134309 , G02F1/1368 , H01L27/1237 , H01L27/124 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.
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公开(公告)号:US20140361292A1
公开(公告)日:2014-12-11
申请号:US14293484
申请日:2014-06-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Masahiko Hayakawa , Shinpei Matsuda , Daisuke Matsubayashi
IPC: H01L29/786
CPC classification number: H01L29/78648 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/3262 , H01L29/045 , H01L29/24 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L29/78696
Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 μm or longer and 6.5 μm or shorter.
Abstract translation: 提供了包括具有优异的电特性(例如导通电流,场效应迁移率或频率特性)的晶体管或包括具有高可靠性的晶体管的半导体器件的半导体器件。 在其中氧化物半导体膜位于第一和第二栅电极之间的沟道蚀刻晶体管的沟道宽度方向上,第一和第二栅极通过第一和第二栅极绝缘膜中的开口部彼此连接。 此外,第一和第二栅电极在沟道宽度方向的横截面中包围氧化物半导体膜,第一栅极绝缘膜设置在第一栅极和氧化物半导体膜之间,第二栅极绝缘膜设置在第二栅极绝缘膜之间 第二栅电极和氧化物半导体膜。 此外,晶体管的沟道长度为0.5μm以上且6.5μm以下。
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公开(公告)号:US20140339544A1
公开(公告)日:2014-11-20
申请号:US14277465
申请日:2014-05-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazuya HANAOKA , Daisuke Matsubayashi , Yoshiyuki Kobayashi , Shunpei Yamazaki , Shinpei Matsuda
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L29/41733 , H01L29/785 , H01L29/7854 , H01L29/78696
Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
Abstract translation: 可以抑制半导体装置小型化时变得更显着的电特性劣化的半导体装置。 半导体器件包括第一氧化物膜,第一氧化物膜上的氧化物半导体膜,与氧化物半导体膜接触的源电极和漏电极,氧化物半导体膜上的第二氧化物膜,源电极和 漏电极,第二氧化膜上的栅极绝缘膜,以及与栅极绝缘膜接触的栅电极。 氧化物半导体膜的顶端部在通道宽度方向观察时呈弯曲状。
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