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公开(公告)号:US11430894B2
公开(公告)日:2022-08-30
申请号:US16710456
申请日:2019-12-11
发明人: Kazuya Hanaoka , Daisuke Matsubayashi , Yoshiyuki Kobayashi , Shunpei Yamazaki , Shinpei Matsuda
IPC分类号: H01L29/78 , H01L29/786 , H01L29/417
摘要: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
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公开(公告)号:US09935363B2
公开(公告)日:2018-04-03
申请号:US14220178
申请日:2014-03-20
发明人: Teruyuki Fujii , Kazuya Hanaoka
CPC分类号: H01Q1/364 , H01Q1/2225 , H01Q1/38 , H01Q9/27
摘要: In a semiconductor device in which a copper plating layer is used for a conductor of an antenna and in which an integrated circuit and the antenna are formed over the same substrate, an object is to prevent an adverse effect on electrical characteristics of a circuit element due to diffusion of copper, as well as to provide a copper plating layer with favorable adhesiveness. Another object is to prevent a defect in the semiconductor device that stems from poor connection between the antenna and the integrated circuit, in the semiconductor device in which the integrated circuit and the antenna are formed over the same substrate. In the semiconductor device, a copper plating layer is used for the antenna, an alloy of Ag, Pd, and Cu is used for a seed layer thereof, and TiN or Ti is used for a barrier layer.
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公开(公告)号:US09842940B2
公开(公告)日:2017-12-12
申请号:US15062268
申请日:2016-03-07
IPC分类号: H01L29/78 , H01L29/786 , H01L29/04 , H01L29/24
CPC分类号: H01L29/78696 , H01L29/045 , H01L29/24 , H01L29/7869
摘要: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.
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公开(公告)号:US09773915B2
公开(公告)日:2017-09-26
申请号:US14293115
申请日:2014-06-02
发明人: Shinya Sasagawa , Motomu Kurata , Kazuya Hanaoka , Suguru Hondo
IPC分类号: H01L29/786 , H01L29/66
CPC分类号: H01L29/7869 , H01L29/66969 , H01L29/78606 , H01L29/78609
摘要: A semiconductor device using oxide semiconductor with favorable electrical characteristics, or a highly reliable semiconductor device is provided. A semiconductor device is manufactured by: forming an oxide semiconductor layer over an insulating surface; forming source and drain electrodes over the oxide semiconductor layer; forming an insulating film and a conductive film in this order over the oxide semiconductor layer and the source and drain electrodes; etching part of the conductive film and insulating film to form a gate electrode and a gate insulating layer, and etching part of the upper portions of the source and drain electrodes to form a first covering layer containing a constituent element of the source and drain electrodes and in contact with the side surface of the gate insulating layer; oxidizing the first covering layer to form a second covering layer; and forming a protective insulating layer containing an oxide over the second covering layer.
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公开(公告)号:US20160293773A1
公开(公告)日:2016-10-06
申请号:US15175595
申请日:2016-06-07
IPC分类号: H01L29/786 , H01L29/66 , H01L29/04
CPC分类号: H01L29/78696 , H01L29/045 , H01L29/66969 , H01L29/78648 , H01L29/7869
摘要: To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
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公开(公告)号:US09018629B2
公开(公告)日:2015-04-28
申请号:US13646084
申请日:2012-10-05
发明人: Sachiaki Tezuka , Atsuo Isobe , Takehisa Hatano , Kazuya Hanaoka
IPC分类号: H01L29/04 , H01L29/786 , H01L29/417 , H01L29/66
CPC分类号: H01L29/66969 , H01L21/463 , H01L21/465 , H01L29/41733 , H01L29/41783 , H01L29/7869
摘要: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.
摘要翻译: 提供具有高电特性的小型化晶体管。 形成作为源电极层和漏电极层的导电膜以覆盖氧化物半导体层和沟道保护层,然后形成与氧化物半导体层和沟道保护层重叠的导电膜的区域, 通过化学机械抛光处理除去。 在除去作为源极电极层和漏极电极层的导电膜的一部分的工序中,不进行使用抗蚀剂掩模的蚀刻工序,所以可以精确地进行精加工。 通过沟道保护层,可以抑制由于在导电膜上的化学机械抛光处理对氧化物半导体层的损坏或膜厚度的降低。
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公开(公告)号:US20140361293A1
公开(公告)日:2014-12-11
申请号:US14294638
申请日:2014-06-03
IPC分类号: H01L29/786
CPC分类号: H01L29/78696 , H01L29/045 , H01L29/66969 , H01L29/78648 , H01L29/7869
摘要: To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
摘要翻译: 提供具有能够抑制其电特性劣化的结构的半导体器件,其在小型化时变得明显。 半导体器件包括绝缘表面上的第一氧化物半导体膜; 第一氧化物半导体膜上的第二氧化物半导体膜; 与第二氧化物半导体膜接触的源电极和漏电极; 第二氧化物半导体膜上的第三氧化物半导体膜,源电极和漏电极; 第三氧化物半导体膜上的栅极绝缘膜; 以及栅极绝缘膜上的栅电极。 栅电极和栅极绝缘膜之间的第一界面具有比第一氧化物半导体膜和第二氧化物半导体膜之间的第二界面更接近绝缘表面的区域。
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公开(公告)号:US11183516B2
公开(公告)日:2021-11-23
申请号:US16266263
申请日:2019-02-04
发明人: Hideomi Suzawa , Yuta Endo , Kazuya Hanaoka
IPC分类号: H01L27/12 , H01L29/786 , H01L21/475 , H01L21/4757
摘要: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.
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公开(公告)号:US09947794B2
公开(公告)日:2018-04-17
申请号:US15432961
申请日:2017-02-15
IPC分类号: H01L29/12 , H01L29/78 , H01L29/66 , H01L29/24 , H01L29/417 , H01L29/786
CPC分类号: H01L29/785 , H01L29/24 , H01L29/41733 , H01L29/41791 , H01L29/42384 , H01L29/66795 , H01L29/66969 , H01L29/7854 , H01L29/78621 , H01L29/7869 , H01L29/78696 , H01L2029/42388
摘要: A semiconductor device that operates at high speed. A semiconductor device with favorable switching characteristics. A highly integrated semiconductor device. A miniaturized semiconductor device. The semiconductor device is formed by: fainting a semiconductor film including an opening, on an insulating surface; forming a conductive film over the semiconductor film and in the opening, and removing the conductive film over the semiconductor film to form a conductive pillar in the opening; forming an island-shaped mask over the conductive pillar and the semiconductor film; etching the conductive pillar and the semiconductor film using the mask to form a first electrode and a first semiconductor; forming a gate insulating film on a top surface and a side surface of the first semiconductor; and forming a gate electrode that is in contact with a top surface of the gate insulating film and faces the top surface and the side surface of the first semiconductor.
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公开(公告)号:US09837551B2
公开(公告)日:2017-12-05
申请号:US14258528
申请日:2014-04-22
发明人: Suguru Hondo , Kazuya Hanaoka , Shinya Sasagawa , Naoto Kusumoto
IPC分类号: H01L29/786 , H01L29/417
CPC分类号: H01L29/78696 , H01L29/41733 , H01L29/7869
摘要: Provided is a semiconductor device that can be miniaturized in a simple process and that can prevent deterioration of electrical characteristics due to miniaturization. The semiconductor device includes an oxide semiconductor layer, a first conductor in contact with the oxide semiconductor layer, and an insulator in contact with the first conductor. Further, an opening portion is provided in the oxide semiconductor layer, the first conductor, and the insulator. In the opening portion, side surfaces of the oxide semiconductor layer, the first conductor, and the insulator are aligned, and the oxide semiconductor layer and the first conductor are electrically connected to a second conductor by side contact.
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