公开(公告)号：US11804551B2

公开(公告)日：2023-10-31

申请号：US17257921

申请日：2019-07-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Matsubayashi ,  Yuichi Yanagisawa ,  Masahiro Takahashi

IPC: H01L29/786 ,  H01L29/10

CPC classification number: H01L29/7869 ,  H01L29/1095 ,  H01L29/78696

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device in which first to third conductors are placed over a first oxide; first and second oxide insulators are placed respectively over the second and third conductors; a second oxide is placed in contact with a side surface of the first oxide insulator, a side surface of the second oxide insulator, and a top surface of the first oxide; a first insulator is placed between the first conductor and the second oxide; and the first oxide insulator and the second oxide insulator are not in contact with the first to third conductors, the first insulator, and the first oxide.

公开(公告)号：US11705522B2

公开(公告)日：2023-07-18

申请号：US17358295

申请日：2021-06-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Tetsuhiro Tanaka ,  Hirokazu Watanabe ,  Yuhei Sato ,  Yasumasa Yamane ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/45 ,  H01L29/66

CPC classification number: H01L29/78618 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

公开(公告)号：US11430894B2

公开(公告)日：2022-08-30

申请号：US16710456

申请日：2019-12-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya Hanaoka ,  Daisuke Matsubayashi ,  Yoshiyuki Kobayashi ,  Shunpei Yamazaki ,  Shinpei Matsuda

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/417

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US11257722B2

公开(公告)日：2022-02-22

申请号：US16629602

申请日：2018-07-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuki Tanemura ,  Etsuko Kamata ,  Hiromi Sawai ,  Daisuke Matsubayashi

IPC: H01L21/84 ,  H01L21/822 ,  H01L27/12

Abstract: A semiconductor device with a high threshold voltage is provided. A first conductor positioned over a substrate, a first insulator positioned over the first conductor, a first oxide positioned in contact with the top surface of the first insulator, a second insulator positioned in contact with the top surface of the first oxide, a second oxide positioned over the second insulator, a third insulator positioned over the second oxide, and a second conductor positioned over the third insulator are included. A mixed layer is formed between the first insulator and the first oxide. The mixed layer contains at least one of atoms contained in the first insulator and at least one of atoms contained in the first oxide. The mixed layer has fixed negative charge.

公开(公告)号：US11217668B2

公开(公告)日：2022-01-04

申请号：US16736862

申请日：2020-01-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tetsuhiro Tanaka ,  Kazuki Tanemura ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/40 ,  H01L49/02 ,  H01L27/12 ,  H01L23/522 ,  H01L27/06 ,  H01L21/8258

Abstract: A miniaturized transistor with reduced parasitic capacitance and highly stable electrical characteristics is provided. High performance and high reliability of a semiconductor device including the transistor is achieved. A first conductor is formed over a substrate, a first insulator is formed over the first conductor, a layer that retains fixed charges is formed over the first insulator, a second insulator is formed over the layer that retains fixed charges, and a transistor is formed over the second insulator. Threshold voltage Vth is controlled by appropriate adjustment of the thicknesses of the first insulator, the second insulator, and the layer that retains fixed charges.

公开(公告)号：US10522690B2

公开(公告)日：2019-12-31

申请号：US15908215

申请日：2018-02-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Okazaki ,  Daisuke Matsubayashi ,  Yuichi Sato

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L29/45 ,  H01L21/441 ,  H01L29/78 ,  H01L27/12

Abstract: A semiconductor device in which parasitic capacitance is reduced is provided. A first insulating layer is deposited over a substrate. A first oxide insulating layer and an oxide semiconductor layer are deposited over the first insulating layer. A second oxide insulating layer is deposited over the oxide semiconductor layer and the first insulating layer. A second insulating layer and a first conductive layer are deposited over the second oxide insulating layer. A gate electrode layer, a gate insulating layer, and a third oxide insulating layer are formed by etching. A sidewall insulating layer including a region in contact with a side surface of the gate electrode layer is formed. A second conductive layer is deposited over the gate electrode layer, the sidewall insulating layer, the oxide semiconductor layer, and the first insulating layer. A third conductive layer is deposited over the second conductive layer. A low-resistance region is formed in the oxide semiconductor layer by performing heat treatment. An element contained in the second conductive layer moves from the second conductive layer to the oxide semiconductor layer side by performing the heat treatment. An element contained in the oxide semiconductor layer moves from the oxide semiconductor layer to the third conductive layer side by performing the heat treatment.

公开(公告)号：US10516062B2

公开(公告)日：2019-12-24

申请号：US16003145

申请日：2018-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Hajime Tokunaga ,  Toshinari Sasaki ,  Keisuke Murayama ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/51 ,  H01L29/66 ,  H01L29/24

Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

公开(公告)号：US10483402B2

公开(公告)日：2019-11-19

申请号：US15474082

申请日：2017-03-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Yutaka Okazaki

IPC: H01L29/786 ,  H01L29/78

Abstract: The semiconductor device includes a transistor including an oxide semiconductor film having a channel formation region, a gate insulating film, and a gate electrode layer. In the transistor, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the thickness of the gate insulating film is large (equivalent oxide thickness which is obtained by converting into a thickness of silicon oxide containing nitrogen is 5 nm or more and 50 nm or less, preferably 10 nm or more and 40 nm or less). Alternatively, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the resistivity of the source region and the drain region is 1.9×10−5 Ω·m or more and 4.8×10−3 Ω·m or less.

公开(公告)号：US10141452B2

公开(公告)日：2018-11-27

申请号：US15864033

申请日：2018-01-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Daisuke Matsubayashi ,  Masaharu Nagai ,  Yoshiaki Yamamoto ,  Takashi Hamada ,  Yutaka Okazaki ,  Shinya Sasagawa ,  Motomu Kurata ,  Naoto Yamade

IPC: H01L29/786 ,  H01L21/46 ,  H01L27/12 ,  H01L29/66 ,  H01L21/425 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/24 ,  H01L29/778

Abstract: A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

公开(公告)号：US10032428B2

公开(公告)日：2018-07-24

申请号：US15223659

申请日：2016-07-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki Miyake ,  Daisuke Matsubayashi

IPC: G09G3/36 ,  H01L27/12

Abstract: To prevent an influence of normally-on characteristics of the transistor which a clock signal is input to a terminal of, a wiring to which a first low power supply potential is applied and a wiring to which a second low power supply potential lower than the first low power supply potential is applied are electrically connected to a gate electrode of the transistor. A semiconductor device including the transistor can operate stably.