公开(公告)号：US20140361290A1

公开(公告)日：2014-12-11

申请号：US14290251

申请日：2014-05-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Seiko INOUE ,  Shinpei MATSUDA ,  Daisuke MATSUBAYASHI ,  Masahiko HAYAKAWA

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1251 ,  H01L27/3258 ,  H01L27/3262

Abstract: In a pixel including a selection transistor, a driver transistor, and a light-emitting element, as the driver transistor, a transistor is used in which a channel is formed in an oxide semiconductor film and its channel length is 0.5 μm or greater and 4.5 μm or less. The driver transistor includes a first gate electrode over an oxide semiconductor film and a second gate electrode below the oxide semiconductor film. The first gate electrode and the second gate electrode are electrically connected to each other and overlap with the oxide semiconductor film. Furthermore, in the selection transistor of a pixel, which does not need to have field-effect mobility as high as that of the driver transistor, a channel length is made longer than at least the channel length of the driver transistor.

Abstract translation: 在包括选择晶体管，驱动晶体管和发光元件的像素中，作为驱动晶体管，使用在氧化物半导体膜中形成沟道并且其沟道长度为0.5μm以上且4.5以下的晶体管 μm以下。 驱动晶体管包括氧化物半导体膜上的第一栅电极和氧化物半导体膜下方的第二栅电极。 第一栅电极和第二栅电极彼此电连接并与氧化物半导体膜重叠。 此外，在不需要具有与驱动晶体管的场效应迁移率一样高的像素的选择晶体管中，使沟道长度比驱动晶体管的沟道长度至少长。

公开(公告)号：US20230378371A1

公开(公告)日：2023-11-23

申请号：US18364749

申请日：2023-08-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yukinori SHIMA ,  Shinpei MATSUDA ,  Haruyuki BABA ,  Ryunosuke HONDA

IPC: H01L29/786 ,  H01L29/778 ,  H01L21/8234 ,  H01L21/02 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/78648 ,  H01L21/823412 ,  H01L21/02565 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/78696 ,  H01L29/24

Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.

公开(公告)号：US20220328694A1

公开(公告)日：2022-10-13

申请号：US17844767

申请日：2022-06-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786 ,  H01L29/417

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US20200335529A1

公开(公告)日：2020-10-22

申请号：US16918472

申请日：2020-07-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yukinori SHIMA ,  Shinpei MATSUDA ,  Haruyuki BABA ,  Ryunosuke HONDA

IPC: H01L27/12 ,  H01L29/778 ,  H01L29/786 ,  H01L29/66

Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.

公开(公告)号：US20190006393A1

公开(公告)日：2019-01-03

申请号：US16039869

申请日：2018-07-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Kenichi OKAZAKI ,  Masahiko HAYAKAWA ,  Shinpei MATSUDA

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1343 ,  G02F1/1368

Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.

公开(公告)号：US20180247958A1

公开(公告)日：2018-08-30

申请号：US15963141

申请日：2018-04-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yukinori SHIMA ,  Shinpei MATSUDA ,  Haruyuki BABA ,  Ryunosuke HONDA

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/778 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L27/1225 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/7869 ,  H01L29/78696

Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.

公开(公告)号：US20170062603A1

公开(公告)日：2017-03-02

申请号：US15251382

申请日：2016-08-30

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Akio SUZUKI ,  Shinpei MATSUDA ,  Shunpei YAMAZAKI

IPC: H01L29/788 ,  H01L27/115 ,  H01L29/22 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/42324 ,  H01L27/1156 ,  H01L29/0673 ,  H01L29/40114 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/66969 ,  H01L29/775 ,  H01L29/7786 ,  H01L29/7869 ,  H01L29/78696 ,  H01L29/7883

Abstract: A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.

Abstract translation: 提供了耐短路效应的晶体管。 晶体管包括环状的第一导体，包括延伸穿过第一导体的环的内部的区域的氧化物半导体，第一导体和氧化物半导体之间的第一绝缘体，第一导体和第二导体之间的第二绝缘体 第一绝缘体，以及在第一导体的环内的电荷陷阱层。 电荷陷阱层位于第二绝缘体的内部并被配置成处于浮置状态。

公开(公告)号：US20160149055A1

公开(公告)日：2016-05-26

申请号：US14942310

申请日：2015-11-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kazuhiro TSUTSUI ,  Shinpei MATSUDA

IPC: H01L29/786 ,  H01L27/108 ,  H01L29/24

CPC classification number: H01L29/78696 ,  H01L27/10805 ,  H01L27/10814 ,  H01L27/1225 ,  H01L27/14634 ,  H01L29/24 ,  H01L29/66818 ,  H01L29/7853 ,  H01L29/7869

Abstract: The present invention provides a transistor having a high on-state current. The transistor includes a plurality of fins, a first oxide semiconductor, a gate insulating film, and a gate electrode. One of adjacent two fins includes a second oxide semiconductor and a third oxide semiconductor. The other includes a fourth oxide semiconductor and the third oxide semiconductor. The second oxide semiconductor and the fourth oxide semiconductor include regions that face each other with the gate electrode positioned therebetween. The gate electrode and the second oxide semiconductor overlap with each other with the gate insulating film and the first oxide semiconductor positioned therebetween. The gate electrode and the fourth oxide semiconductor overlap with each other with the gate insulating film and the first oxide semiconductor positioned therebetween.

Abstract translation: 本发明提供一种具有高导通电流的晶体管。 晶体管包括多个散热片，第一氧化物半导体，栅极绝缘膜和栅电极。 相邻的两个散热片之一包括第二氧化物半导体和第三氧化物半导体。 另一方面包括第四氧化物半导体和第三氧化物半导体。 第二氧化物半导体和第四氧化物半导体包括彼此面对的区域，栅电极位于它们之间。 栅电极和第二氧化物半导体彼此重叠，栅极绝缘膜和第一氧化物半导体位于它们之间。 栅电极和第四氧化物半导体与栅极绝缘膜和位于其间的第一氧化物半导体彼此重叠。

公开(公告)号：US20150109019A1

公开(公告)日：2015-04-23

申请号：US14516096

申请日：2014-10-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinpei MATSUDA ,  Toshihiko TAKEUCHI ,  Daisuke MATSUBAYASHI

IPC: G01R31/26 ,  G01R27/26

CPC classification number: G01R31/2621 ,  H01L22/14 ,  H01L29/4908 ,  H01L29/7869 ,  H01L29/78696

Abstract: A method for evaluating a buried channel in a semiconductor device including a semiconductor layer having a stacked-layer structure is provided. A method for evaluating a semiconductor device is provided, which includes the steps of: electrically short-circuiting a source and a drain of a transistor; applying DC voltage and AC voltage to a gate to obtain a CV characteristic that indicates a relationship between the DC voltage and a capacitance between the gate and each of the source and the drain; and determining that a semiconductor layer of the transistor includes a stacked-layer structure, when the capacitance in a region in an accumulation state in the CV characteristic is increased stepwise.

Abstract translation: 提供了一种用于评估包括具有堆叠层结构的半导体层的半导体器件中的掩埋沟道的方法。 提供了一种用于评估半导体器件的方法，其包括以下步骤：使晶体管的源极和漏极电短路; 将DC电压和AC电压施加到栅极以获得指示DC电压与栅极与源极和漏极之间的电容之间的关系的CV特性; 并且当所述CV特性中的累积状态区域中的电容逐步增加时，确定所述晶体管的半导体层包括堆叠层结构。

公开(公告)号：US20150076472A1

公开(公告)日：2015-03-19

申请号：US14476771

申请日：2014-09-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Shinpei MATSUDA ,  Takuya KAWATA

IPC: H01L27/32

CPC classification number: H01L27/326 ,  H01L27/323 ,  H01L51/003 ,  H01L51/5225 ,  H01L51/5268 ,  H01L51/5275 ,  H01L2251/5361

Abstract: A light-emitting device, a lighting device, a display device, or the like in which the state of a back surface side can be observed when light is not emitted is provided. The light-emitting device includes a plurality of light-emitting portions and a region transmitting visible light in a region other than the light-emitting portions. Alternatively, the light-emitting device includes a plurality of light-transmitting portions transmitting visible light and a light-emitting portion that can emit light in a region other than the light-transmitting portions. When light is not emitted, the state of a back surface side of the light-emitting device is visible through the region transmitting visible light. When light is emitted, the state of the back surface side of the light-emitting device can be made less visible by diffusion of light emitted from the light-emitting portion.

Abstract translation: 提供了在不发光的情况下可以观察背面侧的状态的发光装置，照明装置，显示装置等。 发光装置包括多个发光部分和在发光部分以外的区域中透射可见光的区域。 或者，发光装置包括透射可见光的多个透光部和能够在除了透光部以外的区域发光的发光部。 当不发光时，通过透射可见光的区域可见发光装置的背面侧的状态。 当发光时，可以通过从发光部分发射的光的扩散使得发光装置的背面侧的状态变得不可见。