公开(公告)号：US20220158080A1

公开(公告)日：2022-05-19

申请号：US17649470

申请日：2022-01-31

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Eric Butaud ,  Eric Desbonnets

IPC: H01L41/312 ,  H01L41/08 ,  H03H9/02 ,  H03H9/00 ,  H03H3/02

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

公开(公告)号：US20210280990A1

公开(公告)日：2021-09-09

申请号：US17330237

申请日：2021-05-25

Applicant: Soitec

Inventor： Eric Desbonnets ,  Bernard Aspar

IPC: H01Q23/00 ,  H01L21/762 ,  H01L29/66 ,  H01L29/786 ,  H01Q1/22

Abstract: A structure for radiofrequency applications includes a high-resistivity support substrate having a front face defining a main plane, a charge-trapping layer disposed on the front face of the support substrate, a first dielectric layer disposed on the charge-trapping layer, an active layer disposed on the first dielectric layer, at least one buried electrode disposed above or in the charge-trapping layer. The buried electrode comprises a conductive layer and a second dielectric layer.

公开(公告)号：US20210143053A1

公开(公告)日：2021-05-13

申请号：US17109978

申请日：2020-12-02

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/06

Abstract: Substrates for microelectronic radiofrequency devices may include a substrate comprising a semiconductor material. Trenches may be located in an upper surface of the substrate, at least some of the trenches including a filler material located within the respective trench. A resistivity of the filler material may be 10 kOhms·cm or greater. A piezoelectric material may be located on or above the upper surface of the substrate. Methods of making substrates for microelectronic radiofrequency devices may involve forming trenches in an upper surface of a substrate including a semiconductor material. A filler material may be placed in at least some of the trenches, and a piezoelectric material may be placed on or above the upper surface of the substrate.

公开(公告)号：US10943815B2

公开(公告)日：2021-03-09

申请号：US16308602

申请日：2017-06-06

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/06

Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms-cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms-cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.

公开(公告)号：US10608610B2

公开(公告)日：2020-03-31

申请号：US16064419

申请日：2016-12-21

Applicant: Soitec

Inventor： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC: H03H3/10 ,  H03H9/13 ,  H03H9/145 ,  H03H9/17 ,  H03H9/25 ,  H03H9/56 ,  H03H9/64 ,  H01L27/20 ,  H01L41/047 ,  H03H9/02 ,  H01L41/312 ,  H03H3/02 ,  H03H3/04 ,  H01L41/335

Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.

公开(公告)号：US10347597B2

公开(公告)日：2019-07-09

申请号：US15500721

申请日：2015-07-03

Applicant: Soitec

Inventor： Oleg Kononchuk ,  William Van Den Daele ,  Eric Desbonnets

IPC: H03H3/02 ,  H03H3/08 ,  H01L23/66 ,  H01L41/04 ,  H01L21/306 ,  H01L21/762

Abstract: A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; a mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.

公开(公告)号：US20190157137A1

公开(公告)日：2019-05-23

申请号：US16308602

申请日：2017-06-06

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06

Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms·cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms·cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.

公开(公告)号：US20170207164A1

公开(公告)日：2017-07-20

申请号：US15405867

申请日：2017-01-13

Applicant: Soitec

Inventor： Ionut Radu ,  Eric Desbonnets

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/66

CPC classification number: H01L23/5226 ,  H01L21/76254 ,  H01L21/76877 ,  H01L23/528 ,  H01L23/66 ,  H01L2223/6616

Abstract: Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. Semiconductor structures are fabricated by such methods that include a final substrate, a high resistivity layer disposed over the final substrate and a device layer disposed over the high resistivity layer.

公开(公告)号：US12108678B2

公开(公告)日：2024-10-01

申请号：US17649470

申请日：2022-01-31

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Eric Butaud ,  Eric Desbonnets

IPC: H01L41/08 ,  H03H3/02 ,  H03H9/00 ,  H03H9/02 ,  H10N30/00 ,  H10N30/072

CPC classification number: H10N30/072 ,  H03H3/02 ,  H03H9/0009 ,  H03H9/02047 ,  H03H9/02574 ,  H10N30/708

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

公开(公告)号：US20230378931A1

公开(公告)日：2023-11-23

申请号：US18352972

申请日：2023-07-14

Applicant: Soitec

Inventor： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC: H03H9/02 ,  H03H3/02 ,  H03H9/17 ,  H03H9/145 ,  H10N30/072 ,  H10N30/87 ,  H03H9/64 ,  A61B5/00 ,  H03H9/25 ,  H03H9/56 ,  A61B5/145 ,  A61B5/1459 ,  H03H3/04 ,  H03H9/13 ,  H10N39/00 ,  H03H3/10 ,  H10N30/085

CPC classification number: H03H9/02834 ,  H03H3/02 ,  H03H9/02102 ,  H03H9/17 ,  H03H9/145 ,  H10N30/072 ,  H10N30/87 ,  H03H9/6489 ,  A61B5/685 ,  H03H9/25 ,  H03H9/56 ,  A61B5/14546 ,  A61B5/1459 ,  H03H3/04 ,  H03H9/13 ,  H03H9/02574 ,  H10N39/00 ,  H03H3/10 ,  H10N30/085 ,  H03H2003/0407 ,  A61B2562/0204

Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.