公开(公告)号：US20240097036A1

公开(公告)日：2024-03-21

申请号：US18526317

申请日：2023-12-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Hao Yeh ,  Fu-Ting Yen

IPC: H01L29/78 ,  H01L21/324 ,  H01L21/762 ,  H01L29/66

CPC classification number: H01L29/7849 ,  H01L21/324 ,  H01L21/76224 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A method includes forming a fin over a substrate, forming a dummy gate structure over the fin, removing a portion of the fin adjacent the dummy gate structure to form a first recess, depositing a stressor material in the first recess, removing at least a portion of the stressor material from the first recess, and after removing the at least a portion of the stressor material, epitaxially growing a source/drain region in the first recess.

公开(公告)号：US11908921B2

公开(公告)日：2024-02-20

申请号：US17412896

申请日：2021-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Keng-Chu Lin

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/786 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L29/66553 ,  H01L29/0653 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66742 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/02167 ,  H01L21/02208 ,  H01L21/02219 ,  H01L21/02326 ,  H01L21/02348 ,  H01L21/31111 ,  H01L29/78696

Abstract: The present disclosure is directed to method for the fabrication of spacer structures between source/drain (S/D) epitaxial structures and metal gate structures in nanostructure transistors. The method includes forming a fin structure with alternating first and second nanostructure elements on a substrate. The method also includes etching edge portions of the first nanostructure elements in the fin structure to form cavities. Further, depositing a spacer material on the fin structure to fill the cavities and removing a portion of the spacer material in the cavities to form an opening in the spacer material. In addition, the method includes forming S/D epitaxial structures on the substrate to abut the fin structure and the spacer material so that sidewall portions of the S/D epitaxial structures seal the opening in the spacer material to form an air gap in the spacer material.

公开(公告)号：US11855213B2

公开(公告)日：2023-12-26

申请号：US17657770

申请日：2022-04-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Hao Yeh ,  Fu-Ting Yen

IPC: H01L29/78 ,  H01L21/762 ,  H01L29/66 ,  H01L21/324

CPC classification number: H01L29/7849 ,  H01L21/324 ,  H01L21/76224 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method includes forming a fin over a substrate, forming a dummy gate structure over the fin, removing a portion of the fin adjacent the dummy gate structure to form a first recess, depositing a stressor material in the first recess, removing at least a portion of the stressor material from the first recess, and after removing the at least a portion of the stressor material, epitaxially growing a source/drain region in the first recess.

公开(公告)号：US20230077541A1

公开(公告)日：2023-03-16

申请号：US18053546

申请日：2022-11-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yasutoshi Okuno ,  Fu-Ting Yen ,  Teng-Chun Tsai ,  Ziwei Fang

IPC: H01L21/28 ,  H01L29/66 ,  H01L29/49 ,  H01L29/78 ,  H01L29/51 ,  H01L21/8238

Abstract: A method includes removing a dummy gate stack to form an opening between gate spacers, selectively forming an inhibitor film on sidewalls of the gate spacers, with the sidewalls of the gate spacers facing the opening, and selectively forming a dielectric layer over a surface of a semiconductor region. The inhibitor film inhibits growth of the dielectric layer on the inhibitor film. The method further includes removing the inhibitor film, and forming a replacement gate electrode in a remaining portion of the opening.

公开(公告)号：US20210202735A1

公开(公告)日：2021-07-01

申请号：US17201673

申请日：2021-03-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

公开(公告)号：US11024504B2

公开(公告)日：2021-06-01

申请号：US16940270

申请日：2020-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Wei Su ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Teng-Chun Tsai

IPC: H01L21/28 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/3205 ,  H01L21/32

Abstract: A semiconductor device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, an inhibitor residue over gate structure and between the gate spacers, and source/drain structures on opposite sides of the gate structure. The inhibitor residue lines a sidewall of one of the gate spacers.