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公开(公告)号:US10088761B1
公开(公告)日:2018-10-02
申请号:US15471170
申请日:2017-03-28
发明人: You-Hua Chou , Kuo-Sheng Chuang
摘要: An apparatus for a lithography device is provided, which includes a laser-based particle eliminating component and a particle collector. The laser-based particle eliminating component includes a laser emitter and a laser absorbing member. The laser emitter is configured to emit laser beams for irradiating particles in a space near a photomask of the lithography device. The laser absorbing member is disposed opposite to the laser emitter for absorbing the laser beams. The particle collector is configured for collecting the irradiated particles.
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公开(公告)号:US20170170006A1
公开(公告)日:2017-06-15
申请号:US14968923
申请日:2015-12-15
发明人: Kuo-Sheng Chuang , You-Hua Chou
IPC分类号: H01L21/027 , H01L21/266 , H01L21/02
CPC分类号: H01L21/0273 , H01L21/02057 , H01L21/266 , H01L21/31133
摘要: Methods for manufacturing semiconductor devices are disclosed. A photoresist layer is formed over a substrate. A cryogenic process is performed on the photoresist layer. After the cryogenic process, a cleaning process is performed on the photoresist layer to remove the photoresist layer.
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公开(公告)号:US09579697B2
公开(公告)日:2017-02-28
申请号:US13706403
申请日:2012-12-06
发明人: Jyh-Shiou Hsu , Chi-Ming Yang , Kuo-Sheng Chuang
IPC分类号: B08B9/46 , B08B9/08 , H01L21/67 , H01L21/673
CPC分类号: B08B9/46 , B08B9/0861 , H01L21/67051 , H01L21/67207 , H01L21/67253 , H01L21/67393
摘要: A system for cleaning a container such as semiconductor wafer carrier includes a housing, a cleaning unit in the housing, an analyzing unit within the housing, and a vacuum unit within the housing. The cleaning unit comprises a cleaning chamber, and is configured to spray a cleaning medium into the container in the cleaning chamber and dry the container. The analyzing unit is configured to analyze air inside the container coming out of the cleaning chamber, and provide a testing result for each ingredient of possible airborne molecular contamination (AMC) and humidity. The vacuum unit comprises a vacuum chamber configured to apply vacuum onto a container when the testing result for an ingredient is higher than a respective threshold.
摘要翻译: 用于清洁诸如半导体晶片载体的容器的系统包括壳体,壳体中的清洁单元,壳体内的分析单元以及壳体内的真空单元。 清洁单元包括清洁室,并且构造成将清洁介质喷射到清洁室中的容器中并干燥容器。 分析单元被配置为分析来自清洁室的容器内的空气,并且为每种可能的空气分子污染(AMC)和湿度的成分提供测试结果。 真空单元包括真空室,其构造成当成分的测试结果高于相应的阈值时将真空施加到容器上。
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公开(公告)号:US20140158172A1
公开(公告)日:2014-06-12
申请号:US13706403
申请日:2012-12-06
发明人: Jyh-Shiou Hsu , Chi-Ming Yang , Kuo-Sheng Chuang
IPC分类号: B08B9/46
CPC分类号: B08B9/46 , B08B9/0861 , H01L21/67051 , H01L21/67207 , H01L21/67253 , H01L21/67393
摘要: A system for cleaning a container such as semiconductor wafer carrier includes a housing, a cleaning unit in the housing, an analyzing unit within the housing, and a vacuum unit within the housing. The cleaning unit comprises a cleaning chamber, and is configured to spray a cleaning medium into the container in the cleaning chamber and dry the container. The analyzing unit is configured to analyze air inside the container coming out of the cleaning chamber, and provide a testing result for each ingredient of possible airborne molecular contamination (AMC) and humidity. The vacuum unit comprises a vacuum chamber configured to apply vacuum onto a container when the testing result for an ingredient is higher than a respective threshold.
摘要翻译: 用于清洁诸如半导体晶片载体的容器的系统包括壳体,壳体中的清洁单元,壳体内的分析单元以及壳体内的真空单元。 清洁单元包括清洁室,并且构造成将清洁介质喷射到清洁室中的容器中并干燥容器。 分析单元被配置为分析来自清洁室的容器内的空气,并且为每种可能的空气分子污染(AMC)和湿度的成分提供测试结果。 真空单元包括真空室,其构造成当成分的测试结果高于相应的阈值时将真空施加到容器上。
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公开(公告)号:US11239328B2
公开(公告)日:2022-02-01
申请号:US16926698
申请日:2020-07-11
发明人: Kuo-Sheng Chuang , You-Hua Chou , Ming-Chi Huang
IPC分类号: H01L29/40 , H01L27/088 , H01L29/165 , H01L29/10 , H01L29/51 , H01L29/66 , H01L21/02 , H01L21/28 , H01L21/8234 , H01L21/67 , H01L21/677 , H01L21/311 , H01L29/78 , H01L29/08
摘要: A transistor includes a silicon germanium layer, a gate stack, and source and drain features. The silicon germanium layer has a channel region. The silicon germanium layer has a first silicon-to-germanium ratio. The gate stack is disposed over the channel region of the silicon germanium layer and includes a silicon germanium oxide layer over and in contact with the channel region of the silicon germanium layer, a high-κ dielectric layer over the silicon germanium oxide layer, and a gate electrode over the high-κ dielectric layer. The silicon germanium oxide layer has a second silicon-to-germanium ratio, and the second silicon-to-germanium ratio is substantially the same as the first silicon-to-germanium ratio.
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公开(公告)号:US10978329B2
公开(公告)日:2021-04-13
申请号:US16677626
申请日:2019-11-07
IPC分类号: H01L21/677
摘要: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.
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公开(公告)号:US20210035804A1
公开(公告)日:2021-02-04
申请号:US16931459
申请日:2020-07-17
发明人: You-Hua Chou , Kuo-Sheng Chuang
IPC分类号: H01L21/033 , H01L21/3213
摘要: A method of patterning a material layer includes the following steps. A first material layer is formed over a substrate, and the first material layer includes a first metal compound. Through a first photomask, portions of the first material layer is exposed with a gamma ray, wherein a first metal ion of the first metal compound in the portions of the first material layer is chemically reduced to a first metal grain. Other portions of the first material layer are removed to form a plurality of first hard mask patterns including the first metal grain.
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公开(公告)号:US10483115B2
公开(公告)日:2019-11-19
申请号:US15692528
申请日:2017-08-31
发明人: You-Hua Chou , Kuo-Sheng Chuang
IPC分类号: H01L29/78 , H01L21/285 , H01L23/532 , H01L21/768 , H01L23/58 , H01L23/528 , H01L23/522
摘要: A semiconductor device includes a non-insulator structure, at least one carbon nano-tube (CNT), a dielectric layer, and a graphene-based conductive layer. The CNT is over the non-insulator structure. The dielectric layer surrounds the CNT. The graphene-based conductive layer is over the at least one CNT. The CNTs and the graphene-based conductive layer have low resistance.
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公开(公告)号:US20180284602A1
公开(公告)日:2018-10-04
申请号:US15471151
申请日:2017-03-28
发明人: You-Hua Chou , Kuo-Sheng Chuang
摘要: A method for forming a photomask includes the following steps. A substrate is provided, which has a pattern region and a peripheral region surrounding the pattern region. A first etching operation is performed on a first surface of the substrate to remove first portions of the substrate in the pattern region, so as to form recesses in the pattern region of the substrate. A blasting operation is performed on the first surface of the substrate. A BARC layer is formed filling the recesses and over the first surface of the substrate. A second etching operation is performed on a second surface of the substrate opposite to the first surface until portions of the BARC layer in the recesses are exposed. The BARC layer is removed after the second etching operation, so as to form openings in the substrate in the pattern region.
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30.
公开(公告)号:US20170207109A1
公开(公告)日:2017-07-20
申请号:US14996231
申请日:2016-01-15
IPC分类号: H01L21/673
CPC分类号: H01L21/67775 , H01L21/67772
摘要: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.
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