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公开(公告)号:US20150249057A1
公开(公告)日:2015-09-03
申请号:US14715087
申请日:2015-05-18
发明人: Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Hsin-Hui Lee , Wen-De Wang , Shu-Ting Tsai
IPC分类号: H01L23/58 , H01L21/31 , H01L21/3205 , H01L21/311 , H01L23/00 , H01L21/768 , H01L23/528 , H01L23/31 , H01L23/522 , H01L21/76 , H01L21/306
CPC分类号: H01L23/585 , H01L21/02697 , H01L21/30604 , H01L21/31 , H01L21/31111 , H01L21/32051 , H01L21/6835 , H01L21/76 , H01L21/76816 , H01L21/76877 , H01L23/3171 , H01L23/3192 , H01L23/488 , H01L23/5226 , H01L23/528 , H01L23/562 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/06 , H01L27/14618 , H01L27/14636 , H01L27/1464 , H01L2221/68304 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363 , H01L2224/02166 , H01L2224/03 , H01L2224/03002 , H01L2224/0345 , H01L2224/03452 , H01L2224/0361 , H01L2224/0362 , H01L2224/05025 , H01L2224/05624 , H01L2224/05647 , H01L2224/05666 , H01L2224/05684 , H01L2224/0603 , H01L2224/06181 , H01L2924/01019 , H01L2924/01068 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要: A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided.
摘要翻译: 一种方法包括提供具有密封环区域和电路区域的衬底,在密封环区域上形成密封环结构,在密封环结构上方形成第一前侧钝化层,在相邻的第一侧面钝化层中蚀刻前侧孔 到密封环结构的外部部分,在前侧孔中形成前侧金属垫,以将前侧金属垫连接到密封环结构的外部部分,在密封环结构下方形成第一背侧钝化层,蚀刻背面 邻近密封环结构的外部部分的第一背面钝化层中的孔,以及在背侧孔中形成背面金属垫,以将背面金属垫耦合到密封环结构的外部。 还提供了通过这种方法制造的半导体器件。
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公开(公告)号:US20150194455A1
公开(公告)日:2015-07-09
申请号:US14151285
申请日:2014-01-09
发明人: Cheng-Ying Ho , Pao-Tung Chen , Wen-De Wang , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号: H01L27/146 , H01L23/58
CPC分类号: H01L27/14634 , H01L23/585 , H01L27/14636 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes a first semiconductor chip including a first substrate, a plurality of first dielectric layers and a plurality of conductive lines formed in the first dielectric layers over the first substrate. The semiconductor device further includes a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, the second semiconductor chip including a second substrate, a plurality of second dielectric layers and a plurality of second conductive lines formed in the second dielectric layers over the second substrate. The semiconductor device further includes a first conductive feature extending from the first semiconductor chip to one of the plurality of second conductive lines, and a first seal ring structure extending from the first semiconductor chip to the second semiconductor chip.
摘要翻译: 半导体器件包括第一半导体芯片,其包括第一衬底,多个第一电介质层和形成在第一衬底上的第一电介质层中的多个导电线。 半导体器件还包括第二半导体芯片,其表面接合到第一半导体芯片的第一表面,第二半导体芯片包括第二衬底,多个第二电介质层和形成在第二电介质中的多个第二导电线 层在第二衬底上。 半导体器件还包括从第一半导体芯片延伸到多个第二导电线之一的第一导电特征,以及从第一半导体芯片延伸到第二半导体芯片的第一密封环结构。
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公开(公告)号:US20150187834A1
公开(公告)日:2015-07-02
申请号:US14660605
申请日:2015-03-17
发明人: Chun-Chieh Chuang , Dun-Nian Yaung , Jen-Cheng Liu , Keng-Yu Chou , Pao-Tung Chen , Wen-De Wang
IPC分类号: H01L27/146
CPC分类号: H01L27/14685 , H01L27/1462 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643 , H01L27/14689
摘要: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor includes first and second radiation-detection devices that are disposed in the substrate. The first and second radiation-detection devices are operable to detect radiation waves that enter the substrate through the back side. The image sensor also includes an anti-reflective coating (ARC) layer. The ARC layer is disposed over the back side of the substrate. The ARC layer has first and second ridges that are disposed over the first and second radiation-detection devices, respectively. The first and second ridges each have a first refractive index value. The first and second ridges are separated by a substance having a second refractive index value that is less than the first refractive index value.
摘要翻译: 提供了一种图像传感器装置。 图像传感器装置包括具有正面和背面的基板。 图像传感器包括设置在基板中的第一和第二放射线检测装置。 第一和第二放射线检测装置可操作以检测通过背面进入衬底的辐射波。 图像传感器还包括抗反射涂层(ARC)层。 ARC层设置在基板的背面上。 ARC层具有分别设置在第一和第二辐射检测装置上的第一和第二脊。 第一和第二脊各自具有第一折射率值。 第一和第二脊由具有小于第一折射率值的第二折射率值的物质分开。
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公开(公告)号:US11114486B2
公开(公告)日:2021-09-07
申请号:US15614452
申请日:2017-06-05
发明人: Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Tzu-Hsuan Hsu , Wen-De Wang , Wen-I Hsu
IPC分类号: H01L27/146 , H01L21/761 , H01L21/762 , H01L21/265 , H01L21/28 , H01L29/66
摘要: A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate, wherein the gate dielectric extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and an end cap dielectric layer is between the gate dielectric and the gate electrode over the implant isolation region.
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公开(公告)号:US10566378B2
公开(公告)日:2020-02-18
申请号:US15431132
申请日:2017-02-13
发明人: Shuang-Ji Tsai , Dun-Nian Yaung , Jen-Cheng Liu , Wen-De Wang , Hsiao-Hui Tseng
IPC分类号: H01L23/00 , H01L27/146 , H01L23/48 , H01L23/525
摘要: Provided is a method of fabricating an image sensor device. An exemplary includes forming a plurality of radiation-sensing regions in a substrate. The substrate has a front surface, a back surface, and a sidewall that extends from the front surface to the back surface. The exemplary method further includes forming an interconnect structure over the front surface of the substrate, removing a portion of the substrate to expose a metal interconnect layer of the interconnect structure, and forming a bonding pad on the interconnect structure in a manner so that the bonding pad is electrically coupled to the exposed metal interconnect layer and separated from the sidewall of the substrate.
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公开(公告)号:US10510792B2
公开(公告)日:2019-12-17
申请号:US15730190
申请日:2017-10-11
发明人: Cheng-Ying Ho , Pao-Tung Chen , Wen-De Wang , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号: H01L27/146 , H01L23/58
摘要: A semiconductor device includes a first semiconductor chip including a first substrate, a plurality of first dielectric layers and a plurality of conductive lines formed in the first dielectric layers over the first substrate. The semiconductor device further includes a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, the second semiconductor chip including a second substrate, a plurality of second dielectric layers and a plurality of second conductive lines formed in the second dielectric layers over the second substrate. The semiconductor device further includes a first conductive feature extending from the first semiconductor chip to one of the plurality of second conductive lines, and a first seal ring structure extending from the first semiconductor chip to the second semiconductor chip.
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公开(公告)号:US09812409B2
公开(公告)日:2017-11-07
申请号:US14715087
申请日:2015-05-18
发明人: Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Hsin-Hui Lee , Wen-De Wang , Shu-Ting Tsai
IPC分类号: H01L23/58 , H01L21/683 , H01L23/31 , H01L23/00 , H01L27/146 , H01L21/02 , H01L23/488 , H01L21/306 , H01L21/31 , H01L21/311 , H01L21/3205 , H01L21/76 , H01L21/768 , H01L23/522 , H01L23/528
CPC分类号: H01L23/585 , H01L21/02697 , H01L21/30604 , H01L21/31 , H01L21/31111 , H01L21/32051 , H01L21/6835 , H01L21/76 , H01L21/76816 , H01L21/76877 , H01L23/3171 , H01L23/3192 , H01L23/488 , H01L23/5226 , H01L23/528 , H01L23/562 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/06 , H01L27/14618 , H01L27/14636 , H01L27/1464 , H01L2221/68304 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363 , H01L2224/02166 , H01L2224/03 , H01L2224/03002 , H01L2224/0345 , H01L2224/03452 , H01L2224/0361 , H01L2224/0362 , H01L2224/05025 , H01L2224/05624 , H01L2224/05647 , H01L2224/05666 , H01L2224/05684 , H01L2224/0603 , H01L2224/06181 , H01L2924/01019 , H01L2924/01068 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要: A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided.
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公开(公告)号:US20170271386A1
公开(公告)日:2017-09-21
申请号:US15614452
申请日:2017-06-05
发明人: Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Tzu-Hsuan Hsu , Wen-De Wang , Wen-I Hsu
IPC分类号: H01L27/146 , H01L21/762 , H01L21/761
CPC分类号: H01L27/1463 , H01L21/2652 , H01L21/28017 , H01L21/761 , H01L21/76237 , H01L29/66575
摘要: A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate, wherein the gate dielectric extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and an end cap dielectric layer is between the gate dielectric and the gate electrode over the implant isolation region.
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公开(公告)号:US20170162622A1
公开(公告)日:2017-06-08
申请号:US15437187
申请日:2017-02-20
发明人: Chun-Chieh Chuang , Dun-Nian Yaung , Jen-Cheng Liu , Wen-De Wang , Keng-Yu Chou , Shuang-Ji Tsai , Min-Feng Kao
IPC分类号: H01L27/146
CPC分类号: H01L27/14685 , G02B1/11 , H01L27/1462 , H01L27/14623 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L31/02161 , H01L31/1868 , Y02E10/50 , Y02P70/521
摘要: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.
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公开(公告)号:US09673245B2
公开(公告)日:2017-06-06
申请号:US13632488
申请日:2012-10-01
发明人: Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Tzu-Hsuan Hsu , Wen-De Wang , Wen-I Hsu
IPC分类号: H01L21/76 , H01L27/146 , H01L21/761 , H01L21/762 , H01L21/265 , H01L21/28 , H01L29/66
CPC分类号: H01L27/1463 , H01L21/2652 , H01L21/28017 , H01L21/761 , H01L21/76237 , H01L29/66575
摘要: A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate, wherein the gate dielectric extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and an end cap dielectric layer is between the gate dielectric and the gate electrode over the implant isolation region.
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