公开(公告)号：US09847247B2

公开(公告)日：2017-12-19

申请号：US15590114

申请日：2017-05-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ping-Wei Huang ,  Keng-Jen Lin ,  Yi-Hui Lin ,  Yu-Ren Wang

IPC: H01L29/06 ,  H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/32055 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for filling gaps of semiconductor device and a semiconductor device with insulation gaps formed by the same are provided. First, a silicon substrate with plural protruding portions is provided, and the protruding portions are spaced apart from each other by gaps with predetermined depths. A nitride-containing layer is formed above the silicon substrate for covering the protruding portions and surfaces of the gaps as a liner nitride. Then, an amorphous silicon layer is formed on the nitride-containing layer. An insulating layer is formed on the amorphous silicon layer, and the gaps are filled up with the insulating layer.

公开(公告)号：US09570578B2

公开(公告)日：2017-02-14

申请号：US14619085

申请日：2015-02-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Keng-Jen Lin ,  Chien-Liang Lin ,  Yu-Ren Wang ,  Neng-Hui Yang

IPC: H01L29/66 ,  H01L21/285 ,  H01L21/28 ,  H01L29/49 ,  H01L21/322 ,  H01L29/51

CPC classification number: H01L29/66545 ,  H01L21/28088 ,  H01L21/28506 ,  H01L21/3221 ,  H01L29/4966 ,  H01L29/517

Abstract: A gate forming process includes the following steps. A gate dielectric layer is formed on a substrate. A barrier layer is formed on the gate dielectric layer. A silicon seed layer and a silicon layer are sequentially and directly formed on the barrier layer, wherein the silicon seed layer and the silicon layer are formed by different precursors.

Abstract translation: 门形成工艺包括以下步骤。 在基板上形成栅极电介质层。 在栅介质层上形成阻挡层。 硅晶种层和硅层依次直接形成在阻挡层上，其中硅晶种层和硅层由不同的前体形成。

公开(公告)号：US09543408B1

公开(公告)日：2017-01-10

申请号：US14835730

申请日：2015-08-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi-Hui Lin ,  Keng-Jen Lin ,  Chun-Yao Yang ,  Yu-Ren Wang

IPC: H01L21/3205 ,  H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L21/324 ,  H01L21/3213 ,  H01L21/3215

CPC classification number: H01L29/66545 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02667 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/32055 ,  H01L21/32139 ,  H01L21/32155 ,  H01L21/324 ,  H01L23/544 ,  H01L29/66795 ,  H01L2223/54426 ,  H01L2223/54453

Abstract: A method of forming a patterned hark mask layer includes the following steps. A semiconductor substrate is provided. An amorphous silicon layer is formed on the semiconductor substrate. An implantation process is performed on the amorphous silicon layer. An annealing treatment is performed on the amorphous silicon layer after the implantation process. A patterned hard mask layer is formed on the amorphous silicon layer after the annealing treatment.

Abstract translation: 形成图案化掩模掩模层的方法包括以下步骤。 提供半导体衬底。 在半导体衬底上形成非晶硅层。 对非晶硅层进行注入工艺。 在植入处理之后对非晶硅层进行退火处理。 在退火处理之后，在非晶硅层上形成图案化的硬掩模层。

公开(公告)号：US09130014B2

公开(公告)日：2015-09-08

申请号：US14085811

申请日：2013-11-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Keng-Jen Lin ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Tsuo-Wen Lu ,  Wei-Jen Chen ,  Chih-Chung Chen

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/76237 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/32105 ,  H01L21/76205 ,  H01L21/76224

Abstract: A method for fabricating shallow trench isolation structure is disclosed. The method includes the steps of: (a) providing a substrate; (b) forming a trench in the substrate; (c) forming a silicon layer in the trench; and (d) performing an oxidation process to partially transform a surface of the silicon layer into an oxide layer.

Abstract translation: 公开了一种用于制造浅沟槽隔离结构的方法。 该方法包括以下步骤：（a）提供衬底; （b）在衬底中形成沟槽; （c）在沟槽中形成硅层; 和（d）进行氧化处理以将硅层的表面部分地转变为氧化物层。

公开(公告)号：US20140213034A1

公开(公告)日：2014-07-31

申请号：US13752408

申请日：2013-01-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Lung Chang ,  Chih-Chien Liu ,  Jei-Ming Chen ,  Wen-Yi Teng ,  Jui-Min Lee ,  Keng-Jen Lin ,  Chin-Fu Lin

IPC: H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/76232

Abstract: A method for forming an isolation structure includes the following steps. A hard mask layer is formed on a substrate and a trench is formed in the substrate and the hard mask layer. A protective layer is formed to cover the trench and the hard mask layer. A first isolation material is filled into the trench. An etching process is performed to etch back part of the first isolation material.

Abstract translation: 形成隔离结构的方法包括以下步骤。 在基板上形成硬掩模层，并且在基板和硬掩模层中形成沟槽。 形成保护层以覆盖沟槽和硬掩模层。 第一隔离材料被填充到沟槽中。 执行蚀刻工艺以蚀刻第一隔离材料的一部分。