公开(公告)号：US07209503B1

公开(公告)日：2007-04-24

申请号：US10838671

申请日：2004-05-03

申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Yuri Mirgorodski

发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Yuri Mirgorodski

IPC分类号： H01S5/00

CPC分类号： H01L27/1446 ,  H01L27/146

摘要： An integrated circuit is powered by exposing conductive regions, such as the p+ source regions of the PMOS transistors that are formed to receive a supply voltage, to light energy from a light source. The conductive regions function as photodiodes that produce voltages on the conductive regions via the photovoltaic effect.

摘要翻译： 集成电路通过将形成为接收电源电压的PMOS晶体管的p +源极区域等导电区域暴露于来自光源的光能来供电。 导电区域用作通过光电效应在导电区域上产生电压的光电二极管。

公开(公告)号：US07113427B1

公开(公告)日：2006-09-26

申请号：US11076711

申请日：2005-03-09

申请人： Yuri Mirgorodski ,  Peter J. Hopper ,  Vladislav Vashchenko ,  Philipp Lindorfer

发明人： Yuri Mirgorodski ,  Peter J. Hopper ,  Vladislav Vashchenko ,  Philipp Lindorfer

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C16/12 ,  G11C16/3459 ,  H01L27/115 ,  H01L29/7881

摘要： NVM cell for storing three levels of charge: one erased and two programmed states. The cell comprises a transistor structure providing a gate current versus gate voltage curve having a shape with a flat region or a second peak. To provide such a structure, one embodiment combines two parallel transistors having different threshold voltages, and another embodiment uses one transistor with variable doping. The gate current curve provides two programming zones. Programming the first state includes applying a voltage across a channel, ramping up a gate voltage in the first programming zone, followed by ramping it back down. Programming the second state comprises applying a voltage across a channel, ramping up a gate voltage past the first programming zone and into the second programming zone, followed by ramping it back down. Ramping the voltage back down may optionally be preceded by turning off the voltage across the channel.

摘要翻译： 用于存储三个电荷电平的NVM单元：一个擦除和两个编程状态。 该单元包括提供具有平坦区域或第二峰值的形状的栅极电流对栅极电压曲线的晶体管结构。 为了提供这样的结构，一个实施例组合了具有不同阈值电压的两个并联晶体管，另一实施例使用一个具有可变掺杂的晶体管 栅极电流曲线提供两个编程区域。 对第一状态进行编程包括在一个通道上施加电压，使第一个编程区中的栅极电压升高，然后将其向下斜坡。 对第二状态进行编程包括在通道上施加电压，将栅极电压升高到第一编程区并进入第二编程区，然后将其向下斜坡。 可以选择先将电压降低，然后关闭通道上的电压。

公开(公告)号：US07075341B1

公开(公告)日：2006-07-11

申请号：US10823455

申请日：2004-04-13

申请人： Vladislav Vashchenko ,  Yuri Mirgorodski ,  Peter J. Hopper

发明人： Vladislav Vashchenko ,  Yuri Mirgorodski ,  Peter J. Hopper

IPC分类号： H03B1/00

CPC分类号： H01L27/0266

摘要： A linear time-driver circuit is provided that consumes low space on-chip. The time-driver circuit is based upon the small capacitor charge of the merged region of a 5V tolerant cascaded NMOS device, a single gate device and a zener diode.

摘要翻译： 提供消耗片上低空间的线性时间驱动电路。 时间驱动电路基于5V容限级联NMOS器件，单栅极器件和齐纳二极管的合并区域的小电容器电荷。

公开(公告)号：US07057174B1

公开(公告)日：2006-06-06

申请号：US10355904

申请日：2003-01-30

申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Michael Mian

发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Michael Mian

IPC分类号： H01L31/00

CPC分类号： H01L31/08

摘要： A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed adjacent to the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that alter the magnetic flux of the inductor. The signals can then be detected by detecting the change in the magnetic flux.

摘要翻译： 能够检测千兆赫兹光信号的光子检测器利用与电感线圈相邻形成的光子材料层。 当脉冲光源被施加到光子材料层时，光子材料产生改变电感器的磁通量的涡流。 然后可以通过检测磁通量的变化来检测信号。

公开(公告)号：US06972995B1

公开(公告)日：2005-12-06

申请号：US10821391

申请日：2004-04-09

申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Wendy Greig

发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Wendy Greig

IPC分类号： G11C16/04 ,  G11C16/10 ,  G11C27/00

CPC分类号： G11C27/005 ,  G11C16/10

摘要： The image capture period of an imaging cell, or the total time that an imaging cell is exposed to light energy, is substantially increased by utilizing a non-volatile memory (NVM), such as an electrically-erasable, programmable, read-only-memory (EEPROM) structure. The NVM structure stores and integrates charges that are proportional to the absorbed photons over a large number of sequential integration periods.

摘要翻译： 成像单元的图像捕获周期或成像单元暴露于光能的总时间通过利用诸如电可擦除可编程的只读存储器之类的非易失性存储器（NVM）而显着增加， 存储器（EEPROM）结构。 NVM结构在大量的顺序集成周期内存储和积分与吸收的光子成比例的电荷。

公开(公告)号：US06972457B1

公开(公告)日：2005-12-06

申请号：US10821286

申请日：2004-04-09

申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L27/146 ,  H01L29/76 ,  H01L29/788

CPC分类号： H01L27/11526 ,  H01L27/115 ,  H01L27/11531 ,  H01L27/14603 ,  H01L27/14609

摘要： The integration period of an imaging cell, or the time that an imaging cell is exposed to light energy, is substantially increased by utilizing a single-poly, electrically-programmable, read-only-memory (EPROM) structure to capture the light energy. Photogenerated electrons are formed in the channel region of the EPROM structure from the light energy. The photogenerated electrons are then accelerated into having ionizing collisions which, in turn, leads to electrons being injected onto the floating gate of the EPROM structure at a rate that is proportionate to the number of photons captured by the channel region.

摘要翻译： 成像单元的积分周期或成像单元暴露于光能的时间通过利用单聚电子可编程只读存储器（EPROM）结构捕获光能而大大增加。 光能从EPROM结构的沟道区形成光电子。 光生成的电子然后被加速成具有电离碰撞，其进而导致电子以与通道区域捕获的光子数成正比的速率注入到EPROM结构的浮动栅极上。

公开(公告)号：US06956269B1

公开(公告)日：2005-10-18

申请号：US10744252

申请日：2003-12-22

申请人： Vladislav Vashchenko ,  Michael Mian ,  Peter J. Hopper

发明人： Vladislav Vashchenko ,  Michael Mian ,  Peter J. Hopper

IPC分类号： H01L29/66 ,  H01L29/82

CPC分类号： H01L29/66984

摘要： Spin-based microelectronic devices can be realized by utilizing spin-polarized ferromagnetic materials positioned near, or embedded in, a semiconductor channel of a microelectronic device. Applying an electric field across the channel can cause carriers flowing through the channel to deviate toward one of the ferromagnetic materials, such that the spin of the carriers tends to align with the spin polarization of the respective material. Such a process allows for the controlled spin-polarization of carriers in a semiconductor channel, and hence the development of spin-based microelectronics, without having to inject spin-polarized carriers from a ferromagnet into a semiconductor channel. Such a process avoids the Schottky barrier problem plaguing existing approaches to spin-based microelectronics, while allowing the devices to be based on silicon substrates that are well-known and used in the industry.

摘要翻译： 旋转微电子器件可以通过利用位于微电子器件的半导体通道附近或嵌入其中的自旋极化铁磁材料来实现。 通过通道施加电场可以使流过通道的载流子偏向铁磁材料之一，使得载流子的自旋倾向于与相应材料的自旋极化对准。 这种方法允许半导体通道中载流子的受控自旋极化，从而允许自旋基微电子学的发展，而不必将自旋极化载流子从铁磁体注入到半导体通道中。 这种过程避免了肖特基势垒问题困扰着现有的基于旋转微电子学的方法，同时允许器件基于业界众所周知和使用的硅衬底。

公开(公告)号：US06906357B1

公开(公告)日：2005-06-14

申请号：US10683625

申请日：2003-10-10

申请人： Vladislav Vashchenko ,  Marcel ter Beek ,  Peter J. Hopper ,  Ann Concannon

发明人： Vladislav Vashchenko ,  Marcel ter Beek ,  Peter J. Hopper ,  Ann Concannon

IPC分类号： H01L27/02 ,  H01L29/72

CPC分类号： H01L27/0259

摘要： An apparatus including an electrostatic discharge (ESD) protection structure with a diac in which substancially similar ESD protection is provided for both positive and negative ESD voltages appearing at the circuit electrode sought to be protected.

摘要翻译： 一种包括具有diac的静电放电（ESD）保护结构的装置，其中为保护电路电极处出现的正和负ESD电压提供了基本相似的ESD保护。

公开(公告)号：US06903979B1

公开(公告)日：2005-06-07

申请号：US10664758

申请日：2003-09-17

申请人： Yuri Mirgorodski ,  Vladislav Vashchenko ,  Peter J. Hopper ,  Douglas J. Brisbin

发明人： Yuri Mirgorodski ,  Vladislav Vashchenko ,  Peter J. Hopper ,  Douglas J. Brisbin

IPC分类号： G11C16/00 ,  G11C16/10

CPC分类号： G11C16/10

摘要： A method of programming a PMOS stacked gate memory cell is provided that utilizes the correlation between injection current and substrate current during the programming cycle to provide a feedback correction to the control gate of the memory cell to compensate for the negative potential shift on the floating gate as a result of its charging time.

摘要翻译： 提供了一种编程PMOS堆叠栅极存储单元的方法，其利用在编程周期期间的注入电流和衬底电流之间的相关性来向存储器单元的控制栅极提供反馈校正，以补偿浮置栅极上的负电位移位 作为其充电时间的结果。

公开(公告)号：US06822294B1

公开(公告)日：2004-11-23

申请号：US09896681

申请日：2001-06-29

申请人： Vladislav Vashchenko ,  Ann Concannon ,  Peter J. Hopper

发明人： Vladislav Vashchenko ,  Ann Concannon ,  Peter J. Hopper

IPC分类号： H01L2362

CPC分类号： H01L27/0262 ,  H01L29/87

摘要： In an ESD protection device using a LVTSCR-like structure, the holding voltage is increased by placing the p+ emitter outside the drain of the device, thereby retarding the injection of holes from the p+ emitter. The p+ emitter may be implemented in one or more emitter regions formed outside the drain. The drain is split between a n+ drain and a floating n+ region near the gate to avoid excessive avalanche injection and resultant local overheating.

摘要翻译： 在使用类似LVTSCR的结构的ESD保护器件中，通过将p +发射极放置在器件的漏极之外，从而延长了p +发射极的空穴注入，从而提高了保持电压。 p +发射极可以在形成在漏极外部的一个或多个发射极区域中实现。 漏极在栅极附近的n +漏极和浮动n +区域之间分开，以避免过度的雪崩注入和局部过热。