公开(公告)号：US09099242B2

公开(公告)日：2015-08-04

申请号：US13588696

申请日：2012-08-17

申请人： Young Ghyu Ahn ,  Sang Soo Park ,  Min Cheol Park ,  Se Hwa Jeong

发明人： Young Ghyu Ahn ,  Sang Soo Park ,  Min Cheol Park ,  Se Hwa Jeong

IPC分类号： H05K1/16 ,  H01G4/005 ,  H05K1/02 ,  H01G4/30

CPC分类号： H01G4/005 ,  H01G4/30 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09427 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/2045 ,  Y02P70/611

摘要： A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.

摘要翻译： 层叠芯片电子部件包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 以及在有源层的厚度方向的上部和下部形成的上部和下部覆盖层，所述下部覆盖层的厚度大于上部覆盖层的厚度。

公开(公告)号：US08638543B2

公开(公告)日：2014-01-28

申请号：US13588876

申请日：2012-08-17

申请人： Young Ghyu Ahn ,  Min Cheol Park ,  Doo Young Kim ,  Sang Soo Park

发明人： Young Ghyu Ahn ,  Min Cheol Park ,  Doo Young Kim ,  Sang Soo Park

IPC分类号： H01G4/06 ,  H01G4/005

CPC分类号： H01G4/30 ,  B65B9/04 ,  B65B15/04 ,  H01G2/065 ,  H01G4/012 ,  H01G4/12 ,  H05K1/181 ,  H05K2201/10015

摘要： A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; first and second external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer; and additional electrode layers disposed irrespective of a formation of capacitance within the lower cover layer.

摘要翻译： 层叠芯片电子部件包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的第一外部电极和第二外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 上下层形成在有源层的厚度方向的上部和下部上，下覆盖层的厚度大于上覆盖层的厚度; 以及与下覆盖层内的电容的形成无关地设置的附加电极层。

公开(公告)号：US20130319741A1

公开(公告)日：2013-12-05

申请号：US13588696

申请日：2012-08-17

申请人： Young Ghyu AHN ,  Sang Soo Park ,  Min Cheol Park ,  Se Hwa Jeong

发明人： Young Ghyu AHN ,  Sang Soo Park ,  Min Cheol Park ,  Se Hwa Jeong

IPC分类号： H01G4/12 ,  H05K7/00 ,  H05K1/18

CPC分类号： H01G4/005 ,  H01G4/30 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09427 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/2045 ,  Y02P70/611

摘要： A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.

摘要翻译： 层叠芯片电子部件包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 以及在有源层的厚度方向的上部和下部形成的上部和下部覆盖层，所述下部覆盖层的厚度大于上部覆盖层的厚度。

公开(公告)号：US08456797B1

公开(公告)日：2013-06-04

申请号：US13588876

申请日：2012-08-17

申请人： Young Ghyu Ahn ,  Min Cheol Park ,  Doo Young Kim ,  Sang Soo Park

发明人： Young Ghyu Ahn ,  Min Cheol Park ,  Doo Young Kim ,  Sang Soo Park

IPC分类号： H01G4/06 ,  H01G4/005

摘要： A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; first and second external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer; and additional electrode layers disposed irrespective of a formation of capacitance within the lower cover layer.

公开(公告)号：US08315034B2

公开(公告)日：2012-11-20

申请号：US12245856

申请日：2008-10-06

申请人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

发明人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

IPC分类号： H01G4/228 ,  H01G4/06 ,  H01G4/38

CPC分类号： H01G4/30 ,  H01G4/012 ,  H01G4/232

摘要： A multilayer chip capacitor includes a capacitor body including a first capacitor part and a second capacitor part, first and second external electrodes respectively formed on first and second longer side faces of the capacitor body, and third and fourth external electrodes respectively formed on first and second shorter side faces of the capacitor body. The first capacitor part includes first and second internal electrodes of opposite polarity, and the second capacitor part includes third and fourth internal electrodes of opposite polarity. The first to fourth internal electrodes each have one lead. The first to fourth external electrodes are respectively connected to the leads of the first to fourth internal electrodes. A series resonance frequency of the first capacitor part is different from that of the second capacitor part. Equivalent series resistance (ESR1) of the first capacitor part and the equivalent series resistance (ESR2) of the second capacitor part satisfy ERS1≧20 mΩ and 0.7(ESR1)≦ESR2≦1.3(ESR1).

摘要翻译： 多层片状电容器包括电容器本体，其包括第一电容器部分和第二电容器部分，分别形成在电容器主体的第一和第二长侧面上的第一和第二外部电极，以及分别形成在第一和第二电极部分上的第三和第四外部电极 电容器主体的较短侧面。 第一电容器部分包括具有相反极性的第一和第二内部电极，并且第二电容器部分包括具有相反极性的第三和第四内部电极。 第一至第四内部电极各有一个引线。 第一至第四外部电极分别连接到第一至第四内部电极的引线。 第一电容器部分的串联谐振频率与第二电容器部分的串联谐振频率不同。 第一电容器部分的等效串联电阻（ESR1）和第二电容器部分的等效串联电阻（ESR2）满足ERS1≥20m＆OHgr; 和0.7（ESR1）＆nlE; ESR2＆N1; 1.3（ESR1）。

公开(公告)号：US08184425B2

公开(公告)日：2012-05-22

申请号：US12238796

申请日：2008-09-26

申请人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

发明人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

IPC分类号： H01G4/228 ,  H01G4/005 ,  H01G4/20

CPC分类号： H01G4/228

摘要： There is provided a multilayer capacitor including: a capacitor body where a plurality of dielectric layers are laminated, the capacitor body including first and second surfaces opposing each other in a laminated direction, wherein the first surface provides a mounting surface; a plurality of first and second inner electrodes; an inner connecting conductor; and a plurality of first and second outer electrodes formed on an outer surface of the body, wherein a corresponding one of the outer electrodes having identical polarity to the inner connecting conductor includes at least one outer terminal formed on the first surface of the body to connect to the inner connecting conductor, and at least one outer connecting conductor formed on the second surface of the body to connect a corresponding one of the inner electrodes of identical polarity to the inner connecting conductor.

摘要翻译： 提供了一种层叠电容器，其包括：层叠多个电介质层的电容器体，所述电容器主体包括在层叠方向上彼此相对的第一和第二表面，其中所述第一表面提供安装表面; 多个第一和第二内部电极; 内连接导体; 以及形成在所述主体的外表面上的多个第一外部电极和第二外部电极，其中与所述内部连接导体具有相同极性的相应的外部电极包括形成在所述主体的所述第一表面上的至少一个外部端子，以连接 内部连接导体和形成在主体的第二表面上的至少一个外部连接导体，以将相当极性的相应的一个内部电极与内部连接导体相连接。

公开(公告)号：US07817007B2

公开(公告)日：2010-10-19

申请号：US12194935

申请日：2008-08-20

申请人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hyeog Soo Shin ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

发明人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hyeog Soo Shin ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

IPC分类号： H01F5/00

CPC分类号： H01F17/0013 ,  H01F3/14 ,  H01F17/04

摘要： There is provided a laminated inductor including: a body where a plurality of magnetic layers are laminated; a coil part formed on the magnetic layers, the coil part including a plurality of conductor patterns and a plurality of conductive vias; first and second external electrodes formed on an outer surface of the body to connect to both ends of the coil part, respectively; and a non-magnetic conductor formed on at least one of the magnetic layers so as to relax magnetic saturation caused by direct current flowing through the coil part. The laminated inductor employs the non-magnetic conductor as a non-magnetic gap to be simplified in a manufacturing process and effectively improved in DC superposition characteristics.

摘要翻译： 提供一种层叠电感器，包括：层叠有多个磁性层的主体; 形成在所述磁性层上的线圈部分，所述线圈部分包括多个导体图案和多个导电通孔; 第一外部电极和第二外部电极分别形成在主体的外表面上以连接到线圈部分的两端; 以及形成在至少一个磁性层上的非磁性导体，以便缓和由直流电流流过线圈部分的磁饱和。 层叠电感器在制造工艺中使用非磁性导体作为非磁性间隙进行简化，并有效地改善了DC叠加特性。

公开(公告)号：US20100254070A1

公开(公告)日：2010-10-07

申请号：US12817046

申请日：2010-06-16

申请人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

发明人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

IPC分类号： H01G4/228

CPC分类号： H01G4/30 ,  H01G4/012 ,  H01G4/232

摘要： A multilayer chip capacitor includes: a capacitor body having first and second side surfaces and a bottom surface; a plurality of first and second internal electrodes in the capacitor body; first and second external electrodes having a first polarity and formed on the first and second side surfaces, respectively, to cover a respective lower edge of the side surfaces and to partially extend to the bottom surface; and a third external electrode having a second polarity and formed on the bottom surface. The internal electrodes are disposed in perpendicular to the bottom surface. Each of the first internal electrodes has a first lead drawn to the first side and bottom surfaces and a second lead drawn to the second side and bottom surfaces. Each of the second internal electrodes has a third lead drawn to the bottom surface.

摘要翻译： 一种多层片状电容器包括：具有第一和第二侧表面和底表面的电容器本体; 电容器主体中的多个第一和第二内部电极; 第一和第二外部电极分别具有第一极性并形成在第一和第二侧表面上，以覆盖侧表面的相应下边缘并部分地延伸到底面; 和具有第二极性并形成在底面上的第三外部电极。 内部电极垂直于底面设置。 每个第一内部电极具有被引导到第一侧面和底部表面的第一引线和被引导到第二侧面和底部表面的第二引线。 每个第二内部电极具有被引导到底面的第三引线。

公开(公告)号：US07630208B2

公开(公告)日：2009-12-08

申请号：US12198342

申请日：2008-08-26

申请人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

发明人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

IPC分类号： H05K1/16

CPC分类号： H01G4/232 ,  H01G4/012 ,  H01G4/30 ,  H01G4/385 ,  H05K1/0231 ,  H05K1/113 ,  H05K2201/09309 ,  H05K2201/09772 ,  H05K2201/0979 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

摘要： Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.

摘要翻译： 本发明提供一种多层片状电容器，其包括具有层叠方向配置的第一和第二电容器单元的电容器体; 以及形成在电容器主体外部的多个外部电极。 第一电容器单元包括交替设置在电容器主体的内部的至少一对第一和第二内部电极，第二电容器单元包括交替设置在电容器主体内部的多个第三和第四内部电极， 并且第一至第四内部电极耦合到第一至第四外部电极。 第一电容器单元具有比第二电容器单元更低的等效串联电感（ESL），并且第一电容器单元具有比第二电容器单元更高的等效串联电阻（ESR）。

公开(公告)号：US20080158773A1

公开(公告)日：2008-07-03

申请号：US11979875

申请日：2007-11-09

申请人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

发明人： Byoung Hwa Lee ,  Sung Kwon Wi ,  Hae Suk Chung ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park

IPC分类号： H01G4/228 ,  H01G4/005

CPC分类号： H01G4/232 ,  H01G4/005 ,  H01G4/30 ,  H03H2001/0014

摘要： A multilayer capacitor array having a plurality of multilayer capacitor devices formed in a single multilayer structure, the multilayer capacitor array including: a capacitor body formed by depositing a plurality of dielectric layers and having first and second side surfaces opposite to each other; a plurality of first polarity internal electrodes and second polarity internal electrodes, disposed oppositely to each other in the capacitor body, interposing the dielectric layer there between, and formed of a single electrode plate comprising a single lead, respectively; and a plurality of first polarity external electrodes and second polarity external electrodes, formed on the first side surface and second side surface, respectively, and connected to a correspondent polarity internal electrode via the lead, the first polarity external electrode formed on the first side surface and the second polarity external electrode formed on the second side surface, wherein the numbers of the first polarity external electrodes and the second polarity external electrodes are two or more, respectively, and are identical to each other, and a total number of the multilayer capacitor devices in the multilayer capacitor array is identical to the number of the first polarity external electrodes.

摘要翻译： 1.一种多层电容器阵列，具有形成为单层多层结构的多层多层电容器件，所述层叠电容器阵列包括：通过沉积多个电介质层而形成的电容器体，并且具有彼此相对的第一和第二侧面; 多个第一极性内部电极和第二极性内部电极，其彼此相对设置在电容器主体中，分别在其间插入电介质层，并由单个引线构成的单个电极板形成; 以及多个第一极性外部电极和第二极性外部电极，分别形成在所述第一侧面和所述第二侧面上，并且经由所述引线与相应的极性内部电极连接，所述第一极性外部电极形成在所述第一侧面 和形成在第二侧面上的第二极性外部电极，其中第一极性外部电极和第二极性外部电极的数量分别为两个或更多个，并且彼此相同，并且层叠电容器的总数 多层电容器阵列中的器件与第一极性外部电极的数量相同。