公开(公告)号：US20100164062A1

公开(公告)日：2010-07-01

申请号：US12480694

申请日：2009-06-09

Applicant: Ching-Chiun Wang ,  Tai-Yuan Wu ,  Yu-Sheng Chen ,  Cha-Hsin Lin

Inventor： Ching-Chiun Wang ,  Tai-Yuan Wu ,  Yu-Sheng Chen ,  Cha-Hsin Lin

IPC: H01L29/92 ,  H01L21/02

CPC classification number: H01L28/90 ,  H01L21/76898 ,  H01L21/823475 ,  H01L23/481 ,  H01L27/0629 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13157 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/013

Abstract: A method of manufacturing through-silicon-via (TSV) and a TSV structure are provided. The TSV structure includes a silicon substrate, an annular capacitor, a conductive through-via, a layer of low-k material, and a bump. The annular capacitor is within the silicon substrate and constituted of a first conductive layer, a capacitor dielectric layer, and a second conductive layer from the inside to the outside. The conductive through-via is disposed in the silicon substrate surrounded by the annular capacitor, and the layer of low-k material is between the annular capacitor and the conductive through-via. The bump is in touch with the conductive through-via for bonding other chip.

Abstract translation: 提供了通过硅通孔（TSV）和TSV结构的方法。 TSV结构包括硅衬底，环形电容器，导电通孔，低k材料层和凸块。 环形电容器在硅衬底内，由第一导电层，电容器电介质层和从内向外的第二导电层构成。 导电通孔设置在由环形电容器包围的硅衬底中，低k材料层位于环形电容器和导电通孔之间。 凸块与用于粘合其他芯片的导电通孔相接触。

公开(公告)号：US20060103306A1

公开(公告)日：2006-05-18

申请号：US10986311

申请日：2004-11-12

Applicant: Yu-Sheng Chen ,  Chih-Hsiung Leu ,  Chung-Wang Chou

Inventor： Yu-Sheng Chen ,  Chih-Hsiung Leu ,  Chung-Wang Chou

IPC: H01J17/49 ,  H01J9/00 ,  H01J9/24

CPC classification number: H01J11/36 ,  H01J9/242 ,  H01J11/12 ,  H01J2211/365

Abstract: The present invention discloses a plasma display panel and a method for making the same. The method comprises steps of: A first substrate is provided. Elongated electrodes are formed on the first substrate. An overcoat layer is formed on the elongated electrodes and the first substrate. Then, by means of screen print, a shaping layer of grid-mesh-shaped barrier rib is formed on the overcoat layer. Screen print is applied again to form a plurality of bumps on the shaping layer of grid-mesh-shaped barrier rib; A second substrate is also provided. The second substrate extends paralleled with the first substrate so as to define a discharge space between the first substrate and the second substrate after combining the two substrates. Bumps are provided between the first stripe rib areas and the second stripe rib areas so as to define passages to let air can flow in the discharge space. By the mentioned processes, bumps are provided between the first stripe rib areas and the second stripe rib areas so as to define passages for drawing air. The process is simple and easy for precise alignment.

Abstract translation: 本发明公开了一种等离子体显示面板及其制造方法。 该方法包括以下步骤：提供第一衬底。 细长电极形成在第一基板上。 在细长电极和第一基板上形成外涂层。 然后，通过丝网印刷，在外涂层上形成网状隔壁的成形层。 再次施加丝网印刷以在网格形障壁的成形层上形成多个凸起; 还提供第二基板。 第二衬底与第一衬底平行延伸，以在组合两个衬底之后在第一衬底和第二衬底之间限定放电空间。 在第一条纹肋区域和第二条纹肋区域之间提供凸起，以便限定通道以使空气能够在放电空间中流动。 通过上述处理，在第一条纹肋区域和第二条纹肋条区域之间提供凸起，以便限定用于抽取空气的通道。 该过程简单易于精确对齐。

公开(公告)号：US08913203B2

公开(公告)日：2014-12-16

申请号：US13588671

申请日：2012-08-17

Applicant: Yu-Sheng Chen

Inventor： Yu-Sheng Chen

IPC: G02F1/1335 ,  G02B27/22 ,  G02B27/00 ,  G02B27/26

CPC classification number: G02B27/26 ,  G02B27/0018 ,  G02F1/1335 ,  H04N13/337 ,  H04N2213/001

Abstract: A display module includes a transparent substrate, a black matrix layer, several light-shielding elements and a phase retardation film. The transparent substrate includes left-eye pixel regions and right-eye pixel regions for respectively displaying left-eye images and right-eye images. Each left-eye pixel region is adjacent to each right-eye pixel region. The black matrix layer is disposed on one side of the transparent substrate and corresponds to each boundary between the left-eye and right-eye pixel regions. The light-shielding elements are disposed on the other side of the transparent substrate and respectively correspond to the boundaries between the left-eye and right-eye pixel regions. The phase retardation film is disposed on the other side of the transparent substrate, and has first-phase retardation regions and second-phase retardation regions with difference phases. Positions of the first-phase and second-phase retardation regions respectively correspond to those of the left-eye and right-eye pixel regions.

Abstract translation: 显示模块包括透明基板，黑矩阵层，多个遮光元件和相位延迟膜。 透明基板包括用于分别显示左眼图像和右眼图像的左眼像素区域和右眼像素区域。 每个左眼像素区域与每个右眼像素区域相邻。 黑矩阵层配置在透明基板的一侧，对应于左眼像素区域和右眼像素区域之间的各边界。 遮光元件设置在透明基板的另一侧，分别对应于左眼像素区域和右眼像素区域之间的边界。 相位延迟膜设置在透明基板的另一侧，并且具有差相位的第一相位差区域和第二相位延迟区域。 第一相和第二相延迟区域的位置分别对应于左眼和右眼像素区域的位置。

公开(公告)号：US08711601B2

公开(公告)日：2014-04-29

申请号：US13338264

申请日：2011-12-28

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

IPC: G11C11/00

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/51 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

Abstract: A resistive random access memory (RRAM) cell including a first electrode, a second electrode, and a plurality of repeated sets of layers is provided. Each of the sets of layers includes a resistance-changing layer, a barrier layer, and an ionic exchange layer between the resistance-changing layer and the barrier layer, wherein a thickness of each of the resistance-changing layer, the barrier layer and the ionic exchange layer exceeds a Fermi wavelength, and the thickness each of the resistance-changing layer and ionic exchange layer are less than an electron mean free path. Further, a RRAM module including the aforesaid RRAM cell and a switch is also provided.

Abstract translation: 提供了包括第一电极，第二电极和多个重复的层的电阻随机存取存储器（RRAM）单元。 电阻变化层和阻挡层中的每个层包括电阻变化层，阻挡层和电阻变化层与阻挡层之间的离子交换层，其中电阻变化层，阻挡层和阻挡层 离子交换层超过费米波长，电阻变化层和离子交换层的厚度均小于电子平均自由程。 此外，还提供了包括上述RRAM单元和开关的RRAM模块。

公开(公告)号：US20140077149A1

公开(公告)日：2014-03-20

申请号：US13615683

申请日：2012-09-14

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen ,  Wei-Su Chen ,  Tai-Yuan Wu ,  Pang-Hsu Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen ,  Wei-Su Chen ,  Tai-Yuan Wu ,  Pang-Hsu Chen

IPC: H01L27/24 ,  H01L45/00

CPC classification number: G11C13/0007 ,  G11C2213/15 ,  G11C2213/56 ,  H01L27/2436 ,  H01L27/249 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/146

Abstract: A resistance memory cell including a variable resistance layer is provided. The variable resistance layer includes at least one dominant resistance layer and at least one auxiliary resistance layer. The dominant resistance layer(s) and the auxiliary resistance layer(s) in totality form a closed ion exchange system, the exchanged ions are comparably mobile in each of the dominant resistance layer(s) and the auxiliary resistance layer(s), and the maximum resistance of the at least one dominant resistance layer is higher than that of the at least one auxiliary resistance layer.

Abstract translation: 提供了包括可变电阻层的电阻存储单元。 可变电阻层包括至少一个显性电阻层和至少一个辅助电阻层。 主要电阻层和辅助电阻层总体上形成封闭的离子交换系统，交换的离子在每个主要电阻层和辅助电阻层中是可比较的，以及 至少一个主要电阻层的最大电阻高于至少一个辅助电阻层的最大电阻。

公开(公告)号：US08642985B2

公开(公告)日：2014-02-04

申请号：US13173945

申请日：2011-06-30

Applicant: Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

Inventor： Frederick T. Chen ,  Heng-Yuan Lee ,  Yu-Sheng Chen

IPC: H01L45/00

CPC classification number: G11C13/0007 ,  G11C13/003 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/74 ,  G11C2213/76 ,  H01L27/2418 ,  H01L27/2427 ,  H01L27/249 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/146

Abstract: A memory cell includes a memory element, a current-limiting element electrically coupled to the memory element, and a high-selection-ratio element electrically coupled to the current-limiting element. The memory element is configured to store data as a resistance state. The current-limiting element is a voltage-controlled resistor (VCR) having a resistance that decreases when a voltage applied thereto increases. The high-selection-ratio element has a first resistance that is small when a voltage applied to the memory cell is approximately equal to a selection voltage of the memory cell, and has a second resistance that is substantially larger than the first resistance when the voltage applied to the memory cell is approximately equal to one-half of the selection voltage.

Abstract translation: 存储单元包括存储元件，电耦合到存储元件的限流元件，以及电耦合到限流元件的高选择比元件。 存储元件被配置为将数据存储为电阻状态。 限流元件是具有当施加的电压增加时电阻降低的压控电阻器（VCR）。 高选择比元件在施加到存储单元的电压近似等于存储单元的选择电压时具有小的第一电阻，并且具有比电压的第一电阻显着大于第一电阻的第二电阻 施加到存储单元大约等于选择电压的一半。

公开(公告)号：US20120293349A1

公开(公告)日：2012-11-22

申请号：US13181517

申请日：2011-07-13

Applicant: Yu-Sheng Chen ,  Jia-Shian Tsai ,  Yu-Tso Lin

Inventor： Yu-Sheng Chen ,  Jia-Shian Tsai ,  Yu-Tso Lin

IPC: H03M1/10

CPC classification number: H03M1/1023 ,  H03M1/1014 ,  H03M1/742

Abstract: A signal processing system including a DAC, a comparing unit, and a control unit is provided. The DAC receives a digital input and generates an output voltage. The comparing unit receives the output voltage and compares the output voltage with a reference voltage to output an output value. The control unit receives the output value and accordingly generates the digital input in a manner of value mapping through firmware or software to calibrate the DAC. Furthermore, a self-calibration digital-to-analog converting method is also provided.

Abstract translation: 提供了包括DAC，比较单元和控制单元的信号处理系统。 DAC接收数字输入并产生输出电压。 比较单元接收输出电压并将输出电压与参考电压进行比较以输出输出值。 控制单元接收输出值，从而以通过固件或软件进行值映射的方式产生数字输入，以校准DAC。 此外，还提供了自校准数模转换方法。

公开(公告)号：US08223528B2

公开(公告)日：2012-07-17

申请号：US12649286

申请日：2009-12-29

Applicant: Yu-Sheng Chen ,  Heng-Yuan Lee ,  Yen-Ya Hsu ,  Pang-Shiu Chen ,  Ching-Chih Hsu

Inventor： Yu-Sheng Chen ,  Heng-Yuan Lee ,  Yen-Ya Hsu ,  Pang-Shiu Chen ,  Ching-Chih Hsu

IPC: G11C11/00

CPC classification number: G11C13/0069 ,  G11C13/0064 ,  G11C2013/0071 ,  G11C2013/0073 ,  G11C2213/79

Abstract: A control method for at least one memory cell is disclosed. The memory cell includes a transistor and a resistor. The resistor is connected to the transistor between a first node and a second node. In a programming mode, the memory cell is programmed. The step of programming the memory cell includes providing a first controlling voltage to a gate of the transistor, providing a first setting voltage to the first node, and providing a second setting voltage to the second node. When it is determined that the memory cell has been successfully programmed, a specific action is executed.

Abstract translation: 公开了至少一个存储单元的控制方法。 存储单元包括晶体管和电阻器。 电阻器连接到第一节点和第二节点之间的晶体管。 在编程模式下，存储单元被编程。 编程存储单元的步骤包括向晶体管的栅极提供第一控制电压，向第一节点提供第一设定电压，并向第二节点提供第二设定电压。 当确定存储器单元已被成功编程时，执行特定动作。

公开(公告)号：US20120062287A1

公开(公告)日：2012-03-15

申请号：US13014692

申请日：2011-01-26

Applicant: Sheng-Lyang Jang ,  Yu-Sheng Chen ,  Chia-Wei Chang ,  Cheng-Chen Liu

Inventor： Sheng-Lyang Jang ,  Yu-Sheng Chen ,  Chia-Wei Chang ,  Cheng-Chen Liu

IPC: H03L7/08

CPC classification number: H03B5/1212 ,  H03B5/1228 ,  H03B5/1243 ,  H03B19/14 ,  H03B2200/0034 ,  H03B2200/0074

Abstract: An injection-locked frequency dividing apparatus including a frequency multiplier, a first linear mixer, a second linear mixer, and an oscillator is disclosed. The frequency multiplier receives a frequency signal and generates a multiple-frequency signal accordingly. The first and the second linear mixer both receive the multiple-frequency signal and respectively receive a first input signal and a second input signal, wherein the phases of the first and the second input signal are complementary. The first and the second linear mixer respectively mix the multiple-frequency signal with the first and the second input signal to respectively generate a first mixed signal and a second mixed signal. The oscillator generates the frequency signal. The oscillator further receives the first and the second mixed signal and generates a first output signal and a second output signal accordingly, wherein the phases of the first and the second output signal are complementary.

Abstract translation: 公开了一种包括倍频器，第一线性混频器，第二线性混频器和振荡器的注入锁定分频装置。 倍频器接收频率信号并相应地产生多频信号。 第一和第二线性混频器都接收多频信号并分别接收第一输入信号和第二输入信号，其中第一和第二输入信号的相位是互补的。 第一和第二线性混频器分别将多频信号与第一和第二输入信号混合，分别产生第一混合信号和第二混合信号。 振荡器产生频率信号。 振荡器还接收第一和第二混合信号，并相应地产生第一输出信号和第二输出信号，其中第一和第二输出信号的相位是互补的。

公开(公告)号：US20090133530A1

公开(公告)日：2009-05-28

申请号：US11945360

申请日：2007-11-27

Applicant: Chun-Lung Chen ,  Yu-Sheng Chen ,  Chien-Lin Chen

Inventor： Chun-Lung Chen ,  Yu-Sheng Chen ,  Chien-Lin Chen

IPC: G05G3/00

CPC classification number: B25B13/461 ,  B25B13/462 ,  B25B13/466 ,  Y10T74/2133

Abstract: An actuator for providing functions of one-way actuation and shiftless rotation includes a main body, two rolling elements, and a recovery apparatus, in which an accommodating space is arranged in the main body and has two frictional faces corresponding to each other with a tapered distance between them. Initially, two rolling elements are arranged at one side of the accommodating space of a wider spacing distance and then make a rolling contact with two frictional faces respectively to be displaced toward a narrower side of the accommodating space through the recovery apparatus, so that an aforementioned one-way actuator is thus constructed.

Abstract translation: 用于提供单向致动和无移位旋转的功能的致动器包括主体，两个滚动元件和恢复装置，其中容纳空间布置在主体中并且具有彼此对应的两个摩擦面，其具有锥形 他们之间的距离 最初，两个滚动元件布置在较宽间隔距离的容纳空间的一侧，然后分别与两个摩擦面进行滚动接触，以通过回收装置向容纳空间的较窄侧移动，从而使上述 因此构造单向致动器。