公开(公告)号：US20020093322A1

公开(公告)日：2002-07-18

申请号：US10017911

申请日：2001-12-14

Applicant: STMicroelectronics S.A.

Inventor： Nicolas Marty ,  Regis Robert

IPC: G05F001/40

CPC classification number: G05F1/575 ,  G05F1/565

Abstract: A voltage regulating device includes a comparison circuit for comparing a voltage proportional to an output voltage to a fixed reference voltage. The fixed reference voltage is received on a first input and the voltage proportional to an output voltage is received on a second input. The voltage regulating device further includes a variable resistance-forming circuit controlled by the output of the comparison circuit and disposed so that the output voltage remains substantially constant. The voltage regulating device may be supplied with a variable input voltage. The voltage regulating device further includes a second comparison circuit so that the output voltage remains substantially constant if the input voltage is greater than a threshold, and substantially equal to the input voltage if the input voltage is less than the threshold.

Abstract translation: 电压调节装置包括比较电路，用于将与输出电压成比例的电压与固定参考电压进行比较。 在第一输入端接收固定参考电压，并在第二输入端接收与输出电压成比例的电压。 电压调节装置还包括由比较电路的输出控制的可变电阻形成电路，并被布置为使得输出电压基本保持恒定。 可以向电压调节装置提供可变的输入电压。 电压调节装置还包括第二比较电路，使得如果输入电压大于阈值，则输出电压保持基本恒定，并且如果输入电压小于阈值则基本上等于输入电压。

公开(公告)号：US20020079933A1

公开(公告)日：2002-06-27

申请号：US10034969

申请日：2001-12-21

Applicant: STMicroelectronics S.A.

Inventor： Hubert Degoirat ,  Mathieu Lisart

IPC: H03K005/153

CPC classification number: G01R19/1659 ,  G01R19/16519

Abstract: The disclosure relates to detectors of the level of supply voltage in an integrated circuit. The disclosed detector is designed to detect the crossing of low levels of supply voltage. It comprises a first arm to define a first reference voltage and a second arm to define a second reference voltage, these two reference voltages varying differently as a function of the supply voltage and their curves of variation intersecting for a value of the supply voltage located close to a desired threshold. A comparator receives the two reference voltages. The first arm has a resistive divider bridge, an intermediate connector of which constitutes the first reference voltage. The second arm comprises a resistor series-connected with a native P type MOS transistor, the point of junction of this resistor and this transistor constituting the second reference voltage. A non-linear element may be parallel-connected to the resistor which constitutes the first reference voltage.

Abstract translation: 本公开涉及集成电路中电源电压电平的检测器。 所公开的检测器被设计为检测低电平电平的交叉。 它包括第一臂以限定第一参考电压和第二臂以限定第二参考电压，这两个参考电压作为电源电压的函数而变化，并且它们的变化曲线与位于关闭处的电源电压的值相交 达到期望的阈值。 比较器接收两个参考电压。 第一臂具有电阻分压器桥，其中间连接器构成第一参考电压。 第二臂包括与天然P型MOS晶体管串联连接的电阻器，该电阻器的该结点与该晶体管构成第二参考电压。 非线性元件可以并联连接到构成第一参考电压的电阻器。

公开(公告)号：US20020079545A1

公开(公告)日：2002-06-27

申请号：US09996071

申请日：2001-11-28

Applicant: STMicroelectronics S.A.

Inventor： Cyrille Dray ,  Sigrid Thomas

IPC: H01L029/74

CPC classification number: H03K19/00315 ,  G11C5/145 ,  G11C8/08 ,  G11C16/0441 ,  G11C16/30

Abstract: A high voltage switching device includes a switching circuit for switching a high voltage to an output line and for providing a control signal. The high voltage switching device also includes a switching transistor connected to the switching circuit for switching a low voltage to the output line based upon the control signal. The output signal is controlled by a control circuit that sets up a control loop between the drop in the gate voltage level of the switching transistor and the voltage level of the output line that is controlled by the switching circuit.

Abstract translation: 高压开关装置包括用于将高电压切换到输出线并用于提供控制信号的开关电路。 高压开关装置还包括连接到开关电路的开关晶体管，用于基于控制信号将低电压切换到输出线。 输出信号由控制电路控制，该控制电路在开关晶体管的栅极电压电平的下降与由开关电路控制的输出线的电压电平之间建立控制回路。

公开(公告)号：US20020062456A1

公开(公告)日：2002-05-23

申请号：US09990629

申请日：2001-11-16

Applicant: STMicroelectronics S.A.

Inventor： Xavier Mariaud ,  Daniel Klingelschmidt

IPC: G06F001/28

CPC classification number: G06F13/4068

Abstract: A self-powered peripheral apparatus is connected upstream to another apparatus via a universal serial bus (USB), wherein one of the conductors of the USB provides a supply voltage to the self-powered peripheral apparatus. One of the two data conductors of the USB is connected to a voltage source of the self-powered peripheral apparatus. The self-powered peripheral apparatus includes a control device for controlling the data conductor supply for supplying the latter only if the supply voltage is present on the supply conductor. The control device includes a circuit for detecting the supply voltage and a logic circuit for controlling the regulator.

Abstract translation: 自供电的外围设备经由通用串行总线（USB）上游连接到另一设备，其中USB的一个导体为自供电的外围设备提供电源电压。 USB的两条数据线之一连接到自供电的外围设备的电压源。 自供电的外围设备包括控制装置，用于仅当供应导体上存在电源电压时才控制数据导体供应供应电源。 控制装置包括用于检测电源电压的电路和用于控制调节器的逻辑电路。

公开(公告)号：US20020057092A1

公开(公告)日：2002-05-16

申请号：US09874896

申请日：2001-06-05

Applicant: STMicroelectronics S.A.

Inventor： Raul Andres Bianchi ,  Benoit Froment

IPC: G01R031/12

CPC classification number: H03M1/109 ,  H03M1/78

Abstract: A device includes a capacitive structure including an input node and n output nodes, r integrated capacitors connected in series between two adjacent nodes, an integrated capacitor connected between the input node and ground, an integrated capacitor connected between the nth output node and ground, and r capacitive branches connected in parallel between ground and each node of the capacitive structure including the first output node and the (nnull1)th output node. Each branch may include rnull1 series-connected integrated capacitors. Furthermore, the integrated capacitors of the capacitive structure are theoretically identical. The device may also include a charge source for charging each node of the capacitive structure. Additionally, a measurement circuit may measure the charge at each of the nodes of the structure, and a comparison circuit may compare each measured nodal charge value with a theoretical nodal charge value while taking into account a predetermined nodal tolerance.

Abstract translation: 一种器件包括电容结构，包括输入节点和n个输出节点，串联连接在两个相邻节点之间的r个集成电容器，连接在输入节点和地之间的集成电容器，连接在第n个输出节点和地之间的集成电容器，以及 r电容分支并联连接在包括第一输出节点和第（n-1）输出节点的电容结构的地与每个节点之间。 每个分支可以包括r + 1个串联的集成电容器。 此外，电容结构的集成电容在理论上是相同的。 该装置还可以包括用于为电容结构的每个节点充电的电荷源。 此外，测量电路可以测量结构的每个节点处的电荷，并且比较电路可以将每个测量的节点电荷值与理论节点电荷值进行比较，同时考虑预定的节点公差。

公开(公告)号：US20020053934A1

公开(公告)日：2002-05-09

申请号：US09934452

申请日：2001-08-21

Applicant: STMicroelectronics S.A.

Inventor： Pascal Salome ,  Guy Mabboux

IPC: H03L005/00

CPC classification number: H03K17/0822 ,  H03K17/165 ,  H03K19/00315

Abstract: A protection device includes a switching transistor (M11), connected between the gate of the output transistor (TS1) and ground, and a control circuit (CM), connected to the gate of the switching transistor (M11), which are capable of ensuring that the switching transistor (M11) is off when there is no electrostatic discharge at the drain of the output transistor (TS1) and capable of turning the switching transistor (M11) on when there is an electrostatic discharge at the drain of the output transistor (TS1).

Abstract translation: 保护装置包括连接在输出晶体管（TS1）的栅极和地之间的开关晶体管（M11）和连接到开关晶体管（M11）的栅极的控制电路（CM），其能够确保 当在输出晶体管（TS1）的漏极处没有静电放电并且当在输出晶体管的漏极处存在静电放电时能够使开关晶体管（M11）导通时，开关晶体管（M11）截止 TS1）。

公开(公告)号：US20020039833A1

公开(公告)日：2002-04-04

申请号：US09921642

申请日：2001-08-03

Applicant: STMicroelectronics S.A.

Inventor： Daniel Bensahel ,  Olivier Kermarrec ,  Yves Campidelli

IPC: C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: H01L33/06 ,  B82Y10/00 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/127 ,  H01L33/0054 ,  Y10S438/962 ,  Y10S977/721 ,  Y10S977/891

Abstract: A method of forming, on a single-crystal semiconductor substrate of a first material, quantum dots of a second material, including growing by vapor phase epitaxy the second material on the first material in optimal conditions adapted to ensuring a growth at a maximum controllable rate. In an initial step, a puff of a gas containing the second material is sent on the substrate, in conditions corresponding to a deposition rate much faster than the maximum controllable rate.

Abstract translation: 在第一材料的单晶半导体衬底上形成第二材料的量子点的方法，包括通过气相在第一材料上生长第二材料而生长的最佳条件，以适应最大可控速率的生长 。 在初始步骤中，在对应于比最大可控速率快得多的沉积速率的条件下，在衬底上发送含有第二材料的气体的气泡。

公开(公告)号：US20020015345A1

公开(公告)日：2002-02-07

申请号：US09973380

申请日：2001-10-09

Applicant: STMicroelectronics S.A.

Inventor： Richard Fournel

IPC: G11C007/02

CPC classification number: G11C7/12 ,  G11C16/24

Abstract: In a reading device for a memory, a circuit for the asymmetrical precharging of the differential amplifier is provided so that an output of the reading device switches over to a determined state. In the following evaluation phase, if the memory cell is programmed, the output remains unchanged. If the memory cell is blank or erased, the output of the reading device switches over to another state. A detection circuit detects a sufficient difference between the inputs of the differential amplifier for stopping the asymmetrical precharging and for making the reading device go automatically to the evaluation phase.

Abstract translation: 在用于存储器的读取装置中，提供用于差分放大器的非对称预充电的电路，使得读取装置的输出切换到确定的状态。 在以下评估阶段，如果存储单元被编程，则输出保持不变。 如果存储单元为空白或擦除，则读取装置的输出切换到另一状态。 检测电路检测用于停止非对称预充电的差分放大器的输入之间的充分差异，并使读取装置自动进入评估阶段。

公开(公告)号：US20020014883A1

公开(公告)日：2002-02-07

申请号：US09864917

申请日：2001-05-24

Applicant: STMicroelectronics S.A.

Inventor： Philippe Sirito-Olivier

IPC: G05F003/16

CPC classification number: G05F3/265

Abstract: A current source includes a master branch including a branch current fixing resistor, at least one slave branch, and a current mirror including a mirror transistor in each of the master and slave branches, respectively, to couple the branches. The current source may additionally include at least one of a first circuit for injecting in the current fixing resistor a current proportional to the master branch current and a second circuit for injecting in a degeneration resistor of the mirror transistor of the slave branch a current proportional to a current of the slave branch. The invention is particularly applicable to the manufacture of integrated circuits.

公开(公告)号：US20020009008A1

公开(公告)日：2002-01-24

申请号：US09883697

申请日：2001-06-18

Applicant: STMicroelectronics S.A.

Inventor： Richard Ferrant

IPC: G11C007/00

CPC classification number: G11C11/4094

Abstract: Each memory cell of a memory device is connected to a bit line of a memory array and is associated with a read/rewrite amplifier connected between the bit line and a reference bit line. The bit line and the reference bit line are precharged to a predetermined precharge voltage. The content of a selected memory cell is read and refreshed based upon an associated read/rewrite amplifier. Between the precharging and the reading and refreshing, two capacitors previously charged to a charging voltage greater than the precharge voltage are respectively connected to the bit line and to the reference bit line.

Abstract translation: 存储器件的每个存储器单元连接到存储器阵列的位线，并且与连接在位线和参考位线之间的读取/重写放大器相关联。 位线和参考位线被预充电到预定的预充电电压。 所选择的存储单元的内容基于相关联的读取/重写放大器被读取和刷新。 在预充电和读取和刷新之间，预先充电到大于预充电电压的充电电压的两个电容器分别连接到位线和参考位线。