公开(公告)号：US06653237B2

公开(公告)日：2003-11-25

申请号：US09893859

申请日：2001-06-27

Applicant: Shashank Deshmukh ,  David Mui ,  Jeffrey D. Chinn ,  Dragan V Podlesnik

Inventor： Shashank Deshmukh ,  David Mui ,  Jeffrey D. Chinn ,  Dragan V Podlesnik

IPC: H01L21302

CPC classification number: H01L21/3065 ,  H01L21/32137

Abstract: Processes for forming trenches within silicon substrates are described. According to an embodiment of the invention, a masked substrate is initially provided that comprises (a) a silicon substrate and (b) a patterned resist layer over the silicon substrate. The patterned resist layer has one or more apertures formed therein. Subsequently, a trench is formed in the substrate through the apertures in the resist layer by an inductive plasma-etching step, which is conducted using plasma source gases that comprise SF6, at least one fluorocarbon gas, and N2. If desired, Cl2 can also be provided in addition to the above source gases. The process of the present invention produces chamber deposits in low amounts, while providing high etching rates, high silicon:resist selectivities, and good trench sidewall profile control.

公开(公告)号：US06632321B2

公开(公告)日：2003-10-14

申请号：US09225825

申请日：1999-01-05

Applicant: Thorsten Lill ,  David Mui ,  Michael Grimbergen

Inventor： Thorsten Lill ,  David Mui ,  Michael Grimbergen

IPC: C23F100

CPC classification number: H01L22/26 ,  H01J37/321 ,  H01J37/32935 ,  H01J2237/3348 ,  H01L21/67253

Abstract: A method and apparatus for monitoring, measuring and/or controlling the etch rate in a dry etch semiconductor wafer processing system. The wafer processing system has a monitoring assembly which comprises an electromagnetic radiation source and detector which interferometrically measures the etch rate. The actual rate of change of the etch as it progresses is measures by this technique and is compared to a model of a desired rate of change in a controller. The error between the actual rate of change and the desired rate of change is then used to vary at least one of the process parameters of the system in a direction tending to null the difference.

Abstract translation: 一种用于在干蚀刻半导体晶片处理系统中监测，测量和/或控制蚀刻速率的方法和装置。 晶片处理系统具有监测组件，其包括电磁辐射源和检测器，其干涉测量蚀刻速率。 当进行蚀刻时，实际的蚀刻速率是通过该技术的测量值，并且与控制器中希望的变化率的模型进行比较。 然后，使用实际变化率与期望变化率之间的误差来改变系统的至少一个过程参数，以便将该差异置零。

公开(公告)号：US06589879B2

公开(公告)日：2003-07-08

申请号：US09766187

申请日：2001-01-18

Applicant: Scott M. Williams ,  Wei Liu ,  David Mui

Inventor： Scott M. Williams ,  Wei Liu ,  David Mui

IPC: H01L21302

CPC classification number: H01L21/31116 ,  H01L21/3065 ,  H01L21/3081

Abstract: A nitride etch process particularly useful when integrated with a silicon trench etch needing a sloping silicon surface adjacent to the interface between the silicon and an oxide layer intermediate the silicon and nitride. The nitride etch process is a plasma process having an etching gas mixture of sulfur hexafluoride (SF6) and trifluoromethane (CHF3) although nitrogen or oxygen may be added for additional controls. The trifluoromethane is believed to create a polymer passivation on the sidewalls of the hole being etched which, when the etch reaches the oxide-silicon interface, protects the interface and underlying silicon. The nitride etch may proceed through the oxide or a separate fluorocarbon-based oxide etching step may be performed before a bromine-based etch of the silicon starts.

公开(公告)号：US06317811B1

公开(公告)日：2001-11-13

申请号：US09383737

申请日：1999-08-26

Applicant: Sanjay Raghunath Deshpande ,  David Mui

Inventor： Sanjay Raghunath Deshpande ,  David Mui

IPC: G06F1208

CPC classification number: G06F9/345 ,  G06F9/383 ,  G06F12/0862 ,  G06F2212/6028

Abstract: A method and system for reissuing load requests in a multi-stream prefetch engine of a data processing system is provided. A read transaction is received from a transaction requester, and the read transaction has a base address and a prefetch stream identifier. The received read transaction is issued to a prefetch stream associated with a data prefetch buffer identified by the prefetch stream identifier as the prefetch stream is one of a set of prefetch streams, each of which has an associated prefetch buffer. The read transaction is issued to a prefetch stream associated with a data prefetch buffer, and a set of prefetch addresses are generated, each prefetch address in the set of prefetch addresses being proximate to the base address. A determination is made as to whether the data prefetch buffer has unallocated prefetch buffer entries, and a comparison is made between each prefetch address in the set of prefetch addresses and all prefetch addresses in each data prefetch buffer to determine whether a prefetch address in the set of prefetch addresses collides with a prefetch address in a data prefetch buffer. In response to a determination of an absence of an address collision and a determination that the data prefetch buffer does not have an unallocated prefetch buffer entry, the base address is held for data prefetch reissuance.

Abstract translation: 提供了一种用于在数据处理系统的多流预取引擎中重新发出加载请求的方法和系统。 从交易请求者接收到读取事务，读取事务具有基地址和预取流标识符。 接收到的读取事务被发布到与由预取流标识符标识的数据预取缓冲器相关联的预取流，因为预取流是一组预取流中的一个，每个预取流具有相关联的预取缓冲器。 读取事务被发送到与数据预取缓冲器相关联的预取流，并且生成一组预取地址，预取地址集合中的每个预取地址靠近基地址。 确定数据预取缓冲器是否具有未分配的预取缓冲器条目，并且在每个预取地址组中的每个预取地址和每个数据预取缓冲器中的所有预取地址之间进行比较，以确定该组中的预取地址 预取地址与数据预取缓冲区中的预取地址相冲突。 响应于确定没有地址冲突和确定数据预取缓冲器不具有未分配的预取缓冲器条目，保持基址用于数据预取重新发布。

公开(公告)号：US20110246695A1

公开(公告)日：2011-10-06

申请号：US13162917

申请日：2011-06-17

Applicant: Shigehiro Asano ,  Charles Ray Johns ,  Matthew Edward King ,  Peichun Peter Liu ,  David Mui ,  Jieming Qi

Inventor： Shigehiro Asano ,  Charles Ray Johns ,  Matthew Edward King ,  Peichun Peter Liu ,  David Mui ,  Jieming Qi

IPC: G06F12/00

CPC classification number: H04L41/0896

Abstract: Disclosed is an apparatus which operates to substantially evenly distribute commands and/or data packets issued from a managed program or other entity over a given time period. The even distribution of these commands or data packets minimizes congestion in critical resources such as memory, I/O devices and/or the bus for transferring the data between source and destination. Any unmanaged commands or data packets are treated as in conventional technology.

Abstract translation: 公开了一种操作以在给定时间段内基本上均匀分布从被管理程序或其他实体发出的命令和/或数据分组的装置。 这些命令或数据分组的均匀分布最大限度地减少了诸如存储器，I / O设备和/或用于在源和目的地之间传送数据的总线的关键资源的拥塞。 任何非托管命令或数据包都按常规技术处理。

公开(公告)号：US07900027B2

公开(公告)日：2011-03-01

申请号：US12023913

申请日：2008-01-31

Applicant: Ronald P. Hall ,  Michael Lance Karm ,  David Mui ,  Albert James Van Norstrand, Jr.

Inventor： Ronald P. Hall ,  Michael Lance Karm ,  David Mui ,  Albert James Van Norstrand, Jr.

IPC: G06F9/40 ,  G06F9/312

CPC classification number: G06F9/30134 ,  G06F9/30054 ,  G06F9/3806 ,  G06F9/3842

Abstract: A computer implemented method, a processor chip, a computer program product, and a data processing system managing a link stack. The data processing system utilizes speculative pushes onto and pops from the link stack. The link stack comprises a set of entries, and each entry comprises a set of state bits. A speculative push of a first instruction is received onto the data stack, and the first instruction is stored into a first entry of the set of entries. A first bit is set to indicate that the first instruction is a valid instruction. A second bit is set to indicate that the first instruction has been speculatively pushed onto the link stack. The link stack pointer control is updated to indicate that the first entry is a top-of-data stack entry.

Abstract translation: 计算机实现的方法，处理器芯片，计算机程序产品和管理链路栈的数据处理系统。 数据处理系统利用推测性推送并从链路堆栈弹出。 链路栈包括一组条目，并且每个条目包括一组状态位。 第一指令的推测推送被接收到数据堆栈上，并且第一指令被存储到该组条目的第一条目中。 第一位被设置为指示第一条指令是有效指令。 第二位被设置为指示第一条指令被推测地推到链路栈上。 更新链接堆栈指针控件以指示第一个条目是顶部数据堆栈条目。

公开(公告)号：US20100120647A1

公开(公告)日：2010-05-13

申请号：US12267345

申请日：2008-11-07

Applicant: Ji Zhu ,  Arjun Mendiratta ,  David Mui

Inventor： Ji Zhu ,  Arjun Mendiratta ,  David Mui

IPC: C11D3/37

CPC classification number: C11D7/5004 ,  C11D3/222 ,  C11D3/3765 ,  C11D3/3773 ,  C11D3/3776

Abstract: The embodiments of the present invention provide improved materials for cleaning patterned substrates with fine features. The cleaning materials have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. To assist removing of particles from the wafer (or substrate) surfaces, the polymeric compound of the polymers can contain a polar functional group, which can establish polar-polar molecular interaction and hydrogen bonds with hydrolyzed particles on the wafer surface. The polymers of a polymeric compound(s) with a large molecular weight form long polymer chains and network. The long polymer chains and/or polymer network show superior capabilities of capturing and entrapping contaminants, in comparison to conventional cleaning materials. The polymeric compound(s) of the polymers may also include a functional group that carries charge in the cleaning solution. The charge of the functional group of the polymers improves the particle removal efficiency.

Abstract translation: 本发明的实施例提供用于清洁具有精细特征的图案化衬底的改进材料。 清洁材料在清洁具有精细特征的图案化基材上具有优点，而基本上不损坏特征。 清洁材料是流体，液相或液相/气相，并围绕装置特征变形; 因此，清洁材料基本上不会损坏设备特征或将损坏降低在一起。 为了帮助从晶片（或衬底）表面去除颗粒，聚合物的聚合物可以含有极性官能团，其可以与晶片表面上的水解颗粒建立极性极性的分子相互作用和氢键。 具有大分子量的高分子化合物的聚合物形成长的聚合物链和网络。 与传统清洁材料相比，长的聚合物链和/或聚合物网络显示出捕获和捕获污染物的优异性能。 聚合物的聚合物还可以包括在清洁溶液中携带电荷的官能团。 聚合物官能团的电荷提高了颗粒去除效率。

公开(公告)号：US07203811B2

公开(公告)日：2007-04-10

申请号：US10631542

申请日：2003-07-31

Applicant: Matthew Edward King ,  Peichum Peter Liu ,  David Mui ,  Takeshi Yamazaki

Inventor： Matthew Edward King ,  Peichum Peter Liu ,  David Mui ,  Takeshi Yamazaki

IPC: G00F13/28

CPC classification number: G06F13/28

Abstract: A method and an apparatus are provided for handling a list DMA command in a computer system. The list DMA command relates to an effective address (EA) of a system memory. At least one processor in the system has a local storage. The list DMA command is queued in a DMA queue (DMAQ). A list element is fetched from the local storage to the DMAQ. The list DMA command is read from the DMAQ. A bus request is issued for the list element. If the bus request is a last request, it is determined whether a current list element is a last list element. If the current list element is not the last list element, it is determined whether the current list element is fenced. If the current list element is not fenced, a next list element is fetched regardless of whether all outstanding requests are completed.

Abstract translation: 提供了一种用于处理计算机系统中的列表DMA命令的方法和装置。 列表DMA命令涉及系统存储器的有效地址（EA）。 系统中至少有一个处理器具有本地存储。 列表DMA命令在DMA队列（DMAQ）中排队。 列表元素从本地存储器获取到DMAQ。 从DMAQ读取列表DMA命令。 为列表元素发出总线请求。 如果总线请求是最后一个请求，则确定当前列表元素是否是最后一个列表元素。 如果当前列表元素不是最后的列表元素，则确定当前列表元素是否被围栏。 如果当前列表元素没有围栏，则无论所有未完成的请求是否完成，都会获取下一个列表元素。

公开(公告)号：US20060091108A1

公开(公告)日：2006-05-04

申请号：US11263780

申请日：2005-10-31

Applicant: David Mui ,  Wei Liu ,  Hiroki Sasano

Inventor： David Mui ,  Wei Liu ,  Hiroki Sasano

IPC: G01L21/30 ,  B44C1/22 ,  C23F1/00

CPC classification number: G03F7/70625 ,  H01L21/67207 ,  H01L21/67253 ,  H01L22/20

Abstract: A method for controlling etch processes during fabrication of semiconductor devices comprises tests and measurements performed on non-product and product substrates to define an N-parameter CD control graph that is used to calculate a process time for trimming a patterned mask to a pre-determined width. An apparatus for performing such a method.

公开(公告)号：US20050165987A1

公开(公告)日：2005-07-28

申请号：US10764626

申请日：2004-01-26

Applicant: Shigehiro Asano ,  Peichun Liu ,  David Mui

Inventor： Shigehiro Asano ,  Peichun Liu ,  David Mui

IPC: G06F13/362 ,  G06F13/14 ,  G06F13/36

CPC classification number: G06F13/3625

Abstract: Systems and methods for controlling access by a set of agents to a resource, where the agents have corresponding priorities associated with them, and where a monitor associated with the resource controls accesses by the agents to the resource based on the priorities. One embodiment is implemented in a computer system having multiple processors that are connected to a processor bus. The processor bus includes a shaping monitor configured to control access by the processors to the bus. The shaping monitor attempts to distribute the accesses from each of the processors throughout a base period according to priorities assigned to the processors. The shaping monitor allocates slots to the processors in accordance with their relative priorities. Priorities are initially assigned according to the respective bandwidth needs of the processors, but may be modified based upon comparisons of actual to expected accesses to the bus.

Abstract translation: 用于控制一组代理对资源的访问的系统和方法，其中代理具有与其相关联的相应优先级，以及与资源控制相关联的监视器，以及由代理基于优先级访问资源的位置。 一个实施例在具有连接到处理器总线的多个处理器的计算机系统中实现。 处理器总线包括整形监视器，其被配置为控制处理器对总线的访问。 整形监视器根据分配给处理器的优先级，尝试在整个基期内分配来自每个处理器的访问。 整形监视器根据其相对优先级向处理器分配插槽。 首先根据处理器的各自的带宽需求分配优先级，但是可以基于对总线的实际访问和期望访问的比较来修改优先级。