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公开(公告)号:US20040189501A1
公开(公告)日:2004-09-30
申请号:US10731885
申请日:2003-12-08
Applicant: ESS Technology, Inc.
Inventor: Andrew Martin Mallinson
IPC: H03M003/00
CPC classification number: H03M7/3015 , H03M3/39 , H03M3/50 , H03M7/3028
Abstract: A sigma delta circuit is provided having a sigma delta modulator configured to operate according to a first clock signal and a quantizer connected to the sigma delta modulator, where the quantizer is configured to operate according to a second clock signal. In operation, if a small amplitude signal is received by the sigma delta circuit, the circuit is configured to operate at a fixed output frequency. When a large amplitude signal is received, the circuit is configured to adjust to a different frequency to accommodate the larger signal. The second clock signal may be a variable clock signal, where the quantizer operates according to a variable clock signal in order to adjust to different input signals.
Abstract translation: 提供了一个Σ-Δ电路,其具有被配置为根据第一时钟信号和连接到Σ-Δ调制器的量化器进行操作的Σ-Δ调制器,其中量化器被配置为根据第二时钟信号进行操作。 在操作中,如果Σ-Δ电路接收到小振幅信号,则电路被配置为以固定的输出频率工作。 当接收到大振幅信号时,电路被配置成调节到不同的频率以适应较大的信号。 第二时钟信号可以是可变时钟信号,其中量化器根据可变时钟信号进行操作,以便调整到不同的输入信号。
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32.
公开(公告)号:US20020172500A1
公开(公告)日:2002-11-21
申请号:US09096811
申请日:1998-06-12
Applicant: ESS Technology Inc
Inventor: YU-HAI MAO , C.Y. CHU
IPC: H04N005/781 , H04N005/783
CPC classification number: G11B27/105 , G11B2220/2545 , H04N5/85 , H04N9/8042
Abstract: The present invention provides a method and system for switching between browser and video modes in a standalone VCD-ROM system including a VCD player and a VCD-ROM disk. A browser program is first executed in the VCD-ROM system. The browser program allows a user to navigate through the content of the VCD-ROM disk by selecting hypertext links. The hypertext links are selected by clicking on clickable text, buttons, and graphics. The system also allows the user to play a video by selecting an associated hypertext link. When the video is selected, the method of the present invention saves the return address and the address of the video. The video is then played on the video system. When the video is finished playing, the method of the present invention reloads the return address into the system. This returns the system to the original browser mode of the browser.
Abstract translation: 本发明提供一种用于在包括VCD播放器和VCD-ROM盘的独立VCD-ROM系统中在浏览器和视频模式之间切换的方法和系统。 首先在VCD-ROM系统中执行浏览器程序。 浏览器程序允许用户通过选择超文本链接来浏览VCD-ROM盘的内容。 通过点击可点击的文本,按钮和图形来选择超文本链接。 该系统还允许用户通过选择相关联的超文本链接播放视频。 当选择视频时,本发明的方法保存了视频的返回地址和地址。 视频然后在视频系统上播放。 当视频播放完成时,本发明的方法将返回地址重新加载到系统中。 这将使系统返回到浏览器的原始浏览器模式。
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公开(公告)号:US11606100B1
公开(公告)日:2023-03-14
申请号:US17510035
申请日:2021-10-25
Applicant: ESS Technology, Inc.
Inventor: Yongsheng Xu , Dustin Dale Forman
Abstract: Described herein is an apparatus and method for enhancing the dynamic range of an analog-to-digital converter (ADC). In one embodiment of the present approach, an analog input signal is amplified in a programmable gain amplifier (PGA) before the ADC receives the signal, so that the gain applied to an input signal, and gain (or attenuation) later applied in order to balance the overall gain of the circuit, occurs only in either the analog domain; in the prior art, gain occurs partly in each domain. The ADC gain is then adjusted to compensate for gain of the PGA and balance the overall gain of the circuit. In another embodiment, the ADC gain is adjusted, and gain of a digital gain element that receives the signal from the ADC is adjusted to compensate for the ADC gain and balance the overall gain of the circuit, eliminating the need for a PGA.
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34.
公开(公告)号:US11569839B1
公开(公告)日:2023-01-31
申请号:US17525407
申请日:2021-11-12
Applicant: ESS Technology, Inc.
Inventor: Dustin Dale Forman
Abstract: Described herein is a method and apparatus for enhancing the dynamic range of a digital-to-analog conversion circuit. Dynamic range enhancement (DRE) is accomplished by modifying the gain of components of the circuit so that the gain of components generating noise is effectively reduced. In a circuit utilizing a plurality of 1-bit DACs, analog signal gain is decreased when the full nominal gain of the analog portion of the circuit is not needed to obtain a desired peak output amplitude. The reduction is accomplished by effectively “disconnecting” some of the plurality of 1-bit DACs. Some or all of the 1-bit DACs are configured to have a third or “tri-state” in which there is no connection to the normal two reference levels thus providing no output. If some portion of the 1-bit DACs is placed in the tri-state, both the signal and noise gain will be reduced.
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公开(公告)号:US10652649B2
公开(公告)日:2020-05-12
申请号:US16427260
申请日:2019-05-30
Applicant: ESS Technology, Inc.
Inventor: A. Martin Mallinson , Robert Lynn Blair , Christian Leth Petersen , Paul Christopher Scowen
Abstract: An improved system and method for reducing the ambient noise experienced by a user listening to an earpiece without the use of a microphone is disclosed. An “ambient noise signal” created by the sound pressure wave of the ambient noise acting on the earpiece transducer is obtained. In some embodiments, the ambient noise signal is inverted and fed back, and the inverted signal is added to the intended audio signal being sent to the earpiece so that the ambient noise is cancelled. In other embodiments, a processor receives the ambient noise signal and predicts the modification to the intended audio signal needed to counteract the ambient noise. The ambient noise signal may be obtained by comparing the actual signal across the earpiece transducer to the intended audio signal, or by detecting variations in the current across the transducer from the current generated to drive the transducer.
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公开(公告)号:US10236850B2
公开(公告)日:2019-03-19
申请号:US15620084
申请日:2017-06-12
Applicant: ESS Technology, Inc.
Inventor: A. Martin Mallinson
IPC: H03G3/30 , H03G3/32 , H03G5/00 , H03G5/02 , H03G5/16 , H03G5/24 , H03G9/02 , H03G9/18 , H04R3/00 , H04R3/04
Abstract: A circuit and method is disclosed for filtering an audio signal. The circuit has a first quadrature source and multipliers for multiplying the input signal by the I and Q outputs of the quadrature source. The multiplied inputs are then passed through a pair of low pass filters, which may have an adjustable Q factor. The outputs of the low pass filters are then multiplied in a second pair of multipliers by the I and Q outputs, respectively, of a second quadrature source, which will typically be of the same frequency, but different amplitude and phase, of the first quadrature source. The twice-multiplied signals are then summed by an adder to provide an output signal. The circuit may be modified to include a companding circuit between the low pass filters and the second pair of multipliers that determines the amplitude of the input signal, filters it, and compands the signal in a compandor. The compandor may have adjustable parameters. The circuit thus allows for far greater flexibility and control of the processing of the input signal than prior art circuits.
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公开(公告)号:US09973157B2
公开(公告)日:2018-05-15
申请号:US15261938
申请日:2016-09-10
Applicant: ESS Technology, Inc.
Inventor: Peter John Frith , Yongsheng Xu , A. Martin Mallinson , Robert Lynn Blair
CPC classification number: H03F3/2173 , H03F1/0205 , H03F1/0233 , H03F1/3205 , H03F3/185 , H03F3/217 , H03F3/2171 , H03F3/2175 , H03F3/3061 , H03F3/68 , H03F2200/03 , H04R3/00 , H04R3/04
Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
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公开(公告)号:US09806684B2
公开(公告)日:2017-10-31
申请号:US15261939
申请日:2016-09-10
Applicant: ESS Technology, Inc.
Inventor: Peter John Frith , Yongsheng Xu , A. Martin Mallinson , Robert Lynn Blair
CPC classification number: H03F3/2173 , H03F1/0205 , H03F1/0233 , H03F1/3205 , H03F3/185 , H03F3/217 , H03F3/2171 , H03F3/2175 , H03F3/3061 , H03F3/68 , H03F2200/03 , H04R3/00 , H04R3/04
Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
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公开(公告)号:US09692420B2
公开(公告)日:2017-06-27
申请号:US15339617
申请日:2016-10-31
Applicant: ESS Technology, Inc.
Inventor: A. Martin Mallinson , Robert Lynn Blair
IPC: H03K19/173
CPC classification number: H03K19/173 , H03H5/12 , H03H7/06 , H03H2001/0085 , H03H2210/025 , H03H2210/028
Abstract: A circuit component that is adjustable at run time and a method of designing the circuit are disclosed. The component contains a hierarchy of recursive levels in which a bottom level is a compound element made from two connected simple elements, and each higher level contains two compound elements connected in the same fashion. The described circuit allows for a large number of available values of the component value to be arranged in a logarithmic fashion rather than a linear one as in the prior art, thus generally reducing errors between any desired value for the component and the available values. In addition, such compound elements reduce the power dissipated by the analog element and the susceptibility to noise as compared to prior art adjustable components without adversely affecting the overall gain of the circuit.
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公开(公告)号:US20170111017A1
公开(公告)日:2017-04-20
申请号:US15261939
申请日:2016-09-10
Applicant: ESS Technology, Inc.
Inventor: Peter John Frith , Yongsheng Xu , A. Martin Mallinson , Robert Lynn Blair
CPC classification number: H03F3/2173 , H03F1/0205 , H03F1/0233 , H03F1/3205 , H03F3/185 , H03F3/217 , H03F3/2171 , H03F3/2175 , H03F3/3061 , H03F3/68 , H03F2200/03 , H04R3/00 , H04R3/04
Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
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