公开(公告)号：US20120175778A1

公开(公告)日：2012-07-12

申请号：US12985344

申请日：2011-01-06

Applicant: Hui-Min Wu ,  Bang-Chiang Lan ,  Chien-Hsin Huang ,  Kuan-Yu Wang ,  Chao-An Su ,  Tzung-I Su

Inventor： Hui-Min Wu ,  Bang-Chiang Lan ,  Chien-Hsin Huang ,  Kuan-Yu Wang ,  Chao-An Su ,  Tzung-I Su

IPC: H01L23/482 ,  H01L23/488 ,  H01L21/768

CPC classification number: B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0735 ,  H01L21/76829 ,  H01L23/3171 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A fabrication method of a wafer structure includes: providing a substrate having a plurality of die regions and an edge region surrounding the die regions defined thereon; then, forming a dielectric layer, a plurality of MEMS devices, a plurality of metal-interconnect structures and a plurality bonding pads on the substrate in the die regions; next, removing the dielectric layer disposed on the substrate of the edge region to expose the substrate; and thereafter, forming a passivation layer to cover the substrate and the dielectric layer.

Abstract translation: 晶片结构的制造方法包括：提供具有多个管芯区域的衬底和围绕限定在其上的管芯区域的边缘区域; 然后在所述管芯区域中的所述衬底上形成电介质层，多个MEMS器件，多个金属互连结构和多个接合焊盘; 接下来，去除设置在边缘区域的基板上的电介质层，以露出基板; 然后形成钝化层以覆盖基板和电介质层。

公开(公告)号：US08208768B2

公开(公告)日：2012-06-26

申请号：US12605891

申请日：2009-10-26

Applicant: Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Hui-Min Wu ,  Chien-Hsin Huang ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

Inventor： Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Hui-Min Wu ,  Chien-Hsin Huang ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

IPC: G02B6/12

CPC classification number: G02B6/12004 ,  G02B6/305

Abstract: A focusing member and an optoelectronic device having the same are provided. The focusing member includes multiple levels of conductive plugs and multiple levels of conductive layers that together form an inversed half-boat shape. The optoelectronic device includes a bottom layer, an optical waveguide above the bottom layer, a dielectric layer covering the optical waveguide, and the above focusing member disposed at an edge of the optoelectronic device and located in the dielectric layer above the optical waveguide. A wider end of the inversed half-boat shape of the focusing member faces the outside of the optoelectronic device. The refractive indexes of the bottom layer and the dielectric layer are smaller than that of the optical waveguide.

Abstract translation: 提供聚焦构件和具有该聚焦构件的光电子器件。 聚焦构件包括多个级别的导电插塞和多层导电层，这些导电层一起形成反转的半舟形状。 光电子器件包括底层，底层上方的光波导，覆盖光波导的电介质层，以及设置在光电子器件的边缘并位于光波导上方的电介质层中的上述聚焦构件。 聚焦构件的反转半舟形的较宽端面向光电器件的外侧。 底层和电介质层的折射率小于光波导的折射率。

公开(公告)号：US20110248364A1

公开(公告)日：2011-10-13

申请号：US12756982

申请日：2010-04-08

Applicant: Chien-Hsin Huang ,  Li-Che Chen ,  Ming-I Wang ,  Bang-Chiang Lan ,  Hui-Min Wu ,  Tzung-I Su

Inventor： Chien-Hsin Huang ,  Li-Che Chen ,  Ming-I Wang ,  Bang-Chiang Lan ,  Hui-Min Wu ,  Tzung-I Su

IPC: H01L29/84 ,  H01L21/30

CPC classification number: B81B7/0061 ,  B81B2201/0257 ,  B81C2203/0136 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2924/1461 ,  H04R2201/003 ,  Y10T29/49005 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A wafer level package of micro electromechanical system (MEMS) microphone includes a substrate, a number of dielectric layers stacked on the substrate, a MEMS diaphragm, a number of supporting rings and a protective layer. The MEMS diaphragm is disposed between two adjacent dielectric layers. A first chamber is between the MEMS diaphragm and the substrate. The supporting rings are disposed in some dielectric layers and stacked with each other. An inner diameter of the lower supporting ring is greater than that of the upper supporting ring. The protective layer is disposed on the upmost supporting ring and covers the MEMS diaphragm. A second chamber is between the MEMS diaphragm and the protective layer. The protective layer defines a number of first through holes for exposing the MEMS diaphragm. The wafer level package of MEMS microphone has an advantage of low cost.

Abstract translation: 微机电系统（MEMS）麦克风的晶片级封装包括基板，堆叠在基板上的多个电介质层，MEMS隔膜，多个支撑环和保护层。 MEMS隔膜设置在两个相邻的电介质层之间。 第一腔室位于MEMS隔膜和衬底之间。 支撑环设置在一些电介质层中并彼此堆叠。 下支撑环的内径大于上支撑环的内径。 保护层设置在最上面的支撑环上并覆盖MEMS隔膜。 第二腔室位于MEMS隔膜和保护层之间。 保护层限定许多用于暴露MEMS隔膜的第一通孔。 MEMS麦克风的晶圆级封装具有成本低的优点。

公开(公告)号：US20110158582A1

公开(公告)日：2011-06-30

申请号：US12649337

申请日：2009-12-30

Applicant: Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

Inventor： Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

IPC: G02B6/122 ,  G02B6/136 ,  H01L21/70

CPC classification number: H01L29/78 ,  G02B6/131 ,  G02B6/136

Abstract: A method of forming the structure of the semiconductor device having a waveguide. Firstly, a SOI substrate including a bulk silicon, an insulating layer, and a silicon layer is provided and a device region and a waveguide region are defined on the SOI substrate. Afterwards, a protection layer and a patterned shielding layer are formed to cover the waveguide region and expose the device region. Subsequently, a recess is formed by etching the protection layer, the silicon layer and the insulating layer and thereby the bulk silicon is exposed. After that, an epitaxial silicon layer is formed in the recess and a semiconductor device is subsequently formed on the epitaxial silicon layer. Also, the present invention conquers the poor electrical performance of the semiconductor device integrated into the SOI substrate.

Abstract translation: 一种形成具有波导的半导体器件的结构的方法。 首先，提供包括体硅，绝缘层和硅层的SOI衬底，并且在SOI衬底上限定器件区域和波导区域。 之后，形成保护层和图案化屏蔽层以覆盖波导区域并暴露设备区域。 随后，通过蚀刻保护层，硅层和绝缘层，从而暴露体硅，形成凹部。 之后，在凹槽中形成外延硅层，随后在外延硅层上形成半导体器件。 此外，本发明还涉及集成到SOI衬底中的半导体器件的差的电性能。

公开(公告)号：US20110115039A1

公开(公告)日：2011-05-19

申请号：US12621526

申请日：2009-11-19

Applicant: Chien-Hsin Huang ,  Bang-Chiang Lan ,  Ming-I Wang ,  Hui-Min Wu ,  Tzung-I Su ,  Chao-An Su ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

Inventor： Chien-Hsin Huang ,  Bang-Chiang Lan ,  Ming-I Wang ,  Hui-Min Wu ,  Tzung-I Su ,  Chao-An Su ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

IPC: H01L29/84 ,  H01L21/02

CPC classification number: H04R19/005 ,  B81B3/0072 ,  B81B2201/0221 ,  B81B2201/0257 ,  B81B2203/0127 ,  H01L29/84

Abstract: A micro electro mechanical system (MEMS) structure is disclosed. The MEMS structure includes a backplate electrode and a 3D diaphragm electrode. The 3D diaphragm electrode has a composite structure so that a dielectric is disposed between two metal layers. The 3D diaphragm electrode is adjacent to the backplate electrode to form a variable capacitor together.

Abstract translation: 公开了一种微机电系统（MEMS）结构。 MEMS结构包括背板电极和3D隔膜电极。 3D隔膜电极具有复合结构，使得电介质设置在两个金属层之间。 3D隔膜电极与背板电极相邻，以形成可变电容器。

公开(公告)号：US20110068374A1

公开(公告)日：2011-03-24

申请号：US12565154

申请日：2009-09-23

Applicant: Tzung-Han Tan ,  Bang-Chiang Lan ,  Ming-I Wang ,  Tzung-I Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Chao-An Su ,  Min Chen ,  Meng-Jia Lin

Inventor： Tzung-Han Tan ,  Bang-Chiang Lan ,  Ming-I Wang ,  Tzung-I Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Chao-An Su ,  Min Chen ,  Meng-Jia Lin

IPC: H01L29/84 ,  H01L21/30

CPC classification number: B81C1/00238

Abstract: An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.

Abstract translation: 提供了一种其中埋有微机电系统（MEMS）器件的集成电路（IC）。 集成电路包括衬底，金属氧化物半导体（MOS）器件，金属互连和MEMS器件。 衬底具有逻辑电路区域和MEMS区域。 MOS器件位于衬底的逻辑电路区域上。 由多层电线形成的金属互连和多个通孔位于衬底上方以连接MOS器件。 MEMS器件位于MEMS区域上，并且包括位于金属互连中的任何两个相邻电平线之间并连接到金属互连的夹层膜。

公开(公告)号：US20100317138A1

公开(公告)日：2010-12-16

申请号：US12849168

申请日：2010-08-03

Applicant: Bang-Chiang Lan ,  Ming-I Wang ,  Li-Hsun Ho ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Tzung-I Su

Inventor： Bang-Chiang Lan ,  Ming-I Wang ,  Li-Hsun Ho ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Tzung-I Su

IPC: H01L21/768

CPC classification number: B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0742 ,  Y10T29/41 ,  Y10T29/49155

Abstract: A method for fabricating a MEMS is described as follows. A substrate is provided, including a circuit region and an MEMS region separated from each other. A first metal interconnection structure is formed on the substrate in the circuit region, and simultaneously a first dielectric structure is formed on the substrate in the MEMS region. A second metal interconnection structure is formed on the first metal interconnection structure, and simultaneously a second dielectric structure, at least two metal layers and at least one protection ring are formed on the first dielectric structure. The metal layers and the protection ring are formed in the second dielectric structure and the protection ring connects two adjacent metal layers to define an enclosed space between two adjacent metal layers. The first dielectric structure and the second dielectric structure outside the enclosed space are removed to form an MEMS device in the MEMS region.

Abstract translation: MEMS的制造方法如下所述。 提供了包括彼此分离的电路区域和MEMS区域的衬底。 第一金属互连结构形成在电路区域中的衬底上，并且同时在MEMS区域中的衬底上形成第一电介质结构。 第二金属互连结构形成在第一金属互连结构上，并且同时具有第二电介质结构，至少两个金属层和至少一个保护环形成在第一电介质结构上。 金属层和保护环形成在第二电介质结构中，并且保护环连接两个相邻的金属层以限定两个相邻金属层之间的封闭空间。 除去封闭空间外的第一电介质结构和第二电介质结构，以在MEMS区域中形成MEMS器件。

公开(公告)号：US07851975B2

公开(公告)日：2010-12-14

申请号：US12202563

申请日：2008-09-02

Applicant: Bang-Chiang Lan ,  Ming-I Wang ,  Li-Hsun Ho ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Tzung-I Su

Inventor： Bang-Chiang Lan ,  Ming-I Wang ,  Li-Hsun Ho ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Tzung-I Su

IPC: H01L41/08 ,  H01L27/20

CPC classification number: B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0742 ,  Y10T29/41 ,  Y10T29/49155

Abstract: A microelectromechanical system (MEMS) structure and a fabricating method thereof are described. The MEMS structure includes a fixed part and a movable part. The fixed part is disposed on and connects with a substrate. The movable part including at least two first metal layers, a first protection ring and a first dielectric layer is suspended on the substrate. The first protection ring connects two adjacent first metal layers, so as to define a first enclosed space between the two adjacent first metal layers. The first dielectric layer is disposed in the enclosed space and connects the two adjacent first metal layers.

Abstract translation: 描述了微机电系统（MEMS）结构及其制造方法。 MEMS结构包括固定部分和可动部分。 固定部分设置在基板上并与基板连接。 包括至少两个第一金属层，第一保护环和第一介电层的可移动部分悬挂在基板上。 第一保护环连接两个相邻的第一金属层，以限定两个相邻的第一金属层之间的第一封闭空间。 第一介电层设置在封闭空间中，并且连接两个相邻的第一金属层。

公开(公告)号：US20100052179A1

公开(公告)日：2010-03-04

申请号：US12202563

申请日：2008-09-02

Applicant: Bang-Chiang Lan ,  Ming-I Wang ,  Li-Hsun Ho ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Tzung-I Su

Inventor： Bang-Chiang Lan ,  Ming-I Wang ,  Li-Hsun Ho ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Tzung-I Su

IPC: H01L23/52 ,  H01L21/4763

CPC classification number: B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0742 ,  Y10T29/41 ,  Y10T29/49155

Abstract: A microelectromechanical system (MEMS) structure and a fabricating method thereof are described. The MEMS structure includes a fixed part and a movable part. The fixed part is disposed on and connects with a substrate. The movable part including at least two first metal layers, a first protection ring and a first dielectric layer is suspended on the substrate. The first protection ring connects two adjacent first metal layers, so as to define a first enclosed space between the two adjacent first metal layers. The first dielectric layer is disposed in the enclosed space and connects the two adjacent first metal layers.

Abstract translation: 描述了微机电系统（MEMS）结构及其制造方法。 MEMS结构包括固定部分和可动部分。 固定部分设置在基板上并与基板连接。 包括至少两个第一金属层，第一保护环和第一介电层的可移动部分悬挂在基板上。 第一保护环连接两个相邻的第一金属层，以限定两个相邻的第一金属层之间的第一封闭空间。 第一介电层设置在封闭空间中，并且连接两个相邻的第一金属层。

公开(公告)号：US20090243004A1

公开(公告)日：2009-10-01

申请号：US12056286

申请日：2008-03-27

Applicant: Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

Inventor： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

IPC: H01L29/84 ,  H01L21/00

CPC classification number: B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L27/0688

Abstract: The present invention relates to an integrated structure for a MEMS device and a semiconductor device and a method of fabricating the same, in which an etch stopping device is included on a substrate between the MEMS device and the semiconductor device for protecting the semiconductor device from lateral damage when an oxide releasing process is performed to fabricate the MEMS device. The etch stopping device has various profiles and is selectively formed by an individual fabricating process or is simultaneously formed with the semiconductor device in the same fabricating process. It is a singular structure or a combined stacked multilayered structure, for example, a plurality of rows of pillared etch-resistant material plugs, one or a plurality of wall-shaped etch-resistant material plugs, or a multilayered structure of a stack of which and an etch-resistant material layer.

Abstract translation: 本发明涉及用于MEMS器件和半导体器件的集成结构及其制造方法，其中在MEMS器件和半导体器件之间的衬底上包括蚀刻停止器件，用于保护半导体器件免受横向 执行氧化物释放处理以制造MEMS器件时的损坏。 蚀刻停止装置具有各种形状，并且通过单独的制造工艺选择性地形成，或者在相同的制造工艺中与半导体器件同时形成。 它是单一结构或组合堆叠的多层结构，例如多排支撑的耐蚀刻材料插塞，一个或多个壁状耐蚀刻材料插塞或其堆叠的多层结构 和耐蚀刻材料层。