摘要:
A method of forming a metal-filled opening in a semiconductor or other submicron device substrate includes forming a conductive bulk layer over the substrate surface and in the opening, wherein the conductive bulk layer has a first grain size. A conductive cap layer is formed over the conductive bulk layer, the conductive cap layer having a second grain size that is substantially smaller than the first grain size. At least one of the conductive bulk and cap layers are then planarized to form a planar surface that is substantially coincident with the substrate surface.
摘要:
A method of forming a copper interconnect in an opening within a pattern is described. The copper interconnect has an Rs that is nearly independent of opening width and pattern density. A first copper layer having a concave upper surface and thickness t1 is formed in a via or trench in a dielectric layer by depositing copper and performing a first CMP step. A second copper layer with a thickness t2 where t2≦t1 and having a convex lower surface is deposited on the first copper layer by a selective electroplating method. The first and second copper layers are annealed and then a second CMP step planarizes the second copper layer to become coplanar with the dielectric layer. The invention is also a copper interconnect comprised of the aforementioned copper layers where the first copper layer has a grain density (GD1)≧GD2 for the second copper layer.
摘要翻译:描述了在图案内的开口中形成铜互连的方法。 铜互连具有几乎独立于开口宽度和图案密度的Rs。 通过沉积铜并执行第一CMP步骤,在电介质层中的通孔或沟槽中形成具有凹上表面和厚度t 1的第一铜层。 具有厚度为2 sub>的第二铜层,其中具有凸下表面的第二铜层沉积在第一铜层上 通过选择性电镀方法。 对第一和第二铜层进行退火,然后第二CMP步骤将第二铜层平坦化成与电介质层共面。 本发明也是由上述铜层构成的铜布线,其中第一铜层具有第二铜层的晶粒密度(G SUB D1)= G D2 D2。
摘要:
System and method for processing a semiconductor device surface to reduce dark current and white pixel anomalies. An embodiment comprises a method applied to a semiconductor or photodiode device surface adjacent to a photosensitive region, and opposite a side having circuit structures for the device. A doped layer may optionally be created at a depth of less than about 10 nanometers below the surface of the substrate and may be doped with a boron concentration between about 1E13 and 1E16. An oxide may be created on the substrate using a temperature sufficient to reduce the surface roughness below a predetermined roughness threshold, and optionally at a temperature between about 300° C. and 500° C. and a thickness between about 1 nanometer and about 10 nanometers. A dielectric may then be created on the oxide, the dielectric having a refractive index greater than a predetermined refractive threshold, optionally at least about 2.0.
摘要:
An image sensor includes a substrate having opposite first and second sides, a multilayer structure on the first side of the substrate, and a photo-sensitive element on the second side of the substrate. The photo-sensitive element is configured to receive light that is incident upon the first side and transmitted through the multilayer structure and the substrate. The multilayer structure includes first and second light transmitting layers. The first light transmitting layer is sandwiched between the substrate and the second light transmitting layer. The first light transmitting layer has a refractive index that is from 60% to 90% of a refractive index of the substrate. The second light transmitting layer has a refractive index that is lower than the refractive index of the first light transmitting layer and is from 40% to 70% of the refractive index of the substrate.
摘要:
A method includes forming top metal lines over a semiconductor substrate, wherein the semiconductor substrate is a portion of a wafer having a bevel. When the top metal lines are exposed, an etchant is supplied on the bevel, wherein regions of the wafer sprayed with the etchant has an inner defining line forming a first ring having a first diameter. A trimming step is performed to trim an edge portion of the wafer, wherein an edge of a remaining portion of the wafer has a second diameter substantially equal to or smaller than the first diameter.
摘要:
A semiconductor structure is provided and includes a dielectric layer disposed over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is disposed in the opening.
摘要:
An improved reflectivity optical grid for image sensors. In an embodiment, a backside illuminated CIS device includes a semiconductor substrate having a pixel array area comprising a plurality of photosensors formed on a front side surface of the semiconductor substrate, each of the photosensors forming a pixel in the pixel array area; an optical grid material disposed over a backside surface of the semiconductor substrate, the optical grid material patterned to form an optical grid that bounds each of the pixels in the pixel array area and extending above the semiconductor substrate, the optical grid having sidewalls and a top portion; and a highly reflective coating formed over the optical grid, comprising a pure metal coating of a metal that is at least 99% pure, and a high-k dielectric coating over the pure metal coating that has a refractive index of greater than about 2.0. Methods are also disclosed.
摘要:
A semiconductor manufacturing apparatus includes at least one inner retaining ring, and an outer retaining ring. The at least one inner retaining ring applies a first pressure to the polishing pad, and retains a substrate on the polishing pad. The outer retaining ring applies a second pressure to the polishing pad, and retains the at least one inner retaining ring on the polishing pad. Control of the first pressure is independent with respect to control of the second pressure.
摘要:
A grinding wheel comprises an outer base with a first attached grain pad; and an inner frame with a second attached grain pad; and a spindle axis shared by the outer base and the inner frame, wherein at least one of the outer base and the inner frame can move independently along the shared spindle axis; and wherein the outer base, the inner frame, and the shared spindle axis all have a same center. A grinding system comprises an above said grinding wheel, and a wheel head attached to the shared spindle axis, capable of moving vertically, in addition to a motor driving the grinding wheel to spin; and a chuck table for fixing a wafer on top of the chuck table; wherein the grinding wheel overlaps a portion of the chuck table, each capable of spinning to the opposite direction of another.
摘要:
A semiconductor structure is provided and includes a dielectric layer disposed over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is disposed in the opening.