公开(公告)号：US20120056265A1

公开(公告)日：2012-03-08

申请号：US12876933

申请日：2010-09-07

Applicant: Wen-Ping Liang ,  Kuo-Hui Su

Inventor： Wen-Ping Liang ,  Kuo-Hui Su

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/785 ,  H01L29/66795

Abstract: A semiconductor device is disclosed, including a substrate, a fin type semiconductor layer disposed on the substrate, a gate dielectric layer disposed on a top and sidewalls of the fin type semiconductor layer, a metal nitride layer disposed on the gate dielectric layer, and an aluminum doped metal nitride layer disposed on the metal nitride layer. In an embodiment of the invention, the metal nitride layer is a titanium nitride layer and the aluminum doped metal nitride layer is an aluminum doped titanium nitride layer.

Abstract translation: 公开了一种半导体器件，包括衬底，设置在衬底上的鳍式半导体层，设置在鳍式半导体层的顶部和侧壁上的栅极电介质层，设置在栅极介电层上的金属氮化物层，以及 设置在金属氮化物层上的铝掺杂金属氮化物层。 在本发明的一个实施例中，金属氮化物层是氮化钛层，铝掺杂的金属氮化物层是铝掺杂的氮化钛层。

公开(公告)号：US08003528B2

公开(公告)日：2011-08-23

申请号：US12815407

申请日：2010-06-15

Applicant: Yi-Jen Lo ,  Yu-Shan Chiu ,  Kuo-Hui Su ,  Chiang-Hung Lin

Inventor： Yi-Jen Lo ,  Yu-Shan Chiu ,  Kuo-Hui Su ,  Chiang-Hung Lin

IPC: H01L21/443

CPC classification number: H01L29/4983 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28105 ,  H01L21/28562 ,  H01L21/76852 ,  H01L23/53266 ,  H01L29/495 ,  H01L29/4966 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for forming a semiconductor structure is provided. The method includes providing a substrate; forming a dielectric layer on the substrate; forming a conductor pattern on a main surface of the dielectric layer, the conductor pattern having a top surface and sidewalls; and performing a selective atomic layer deposition (ALD) process to selectively deposit a conformal metal layer onto the top surface and sidewalls of the conductor pattern, but without depositing onto the main surface of the dielectric layer substantially.

Abstract translation: 提供一种形成半导体结构的方法。 该方法包括提供基板; 在基板上形成电介质层; 在所述电介质层的主表面上形成导体图案，所述导体图案具有顶表面和侧壁; 并且执行选择性原子层沉积（ALD）工艺以选择性地将共形金属层沉积到导体图案的顶表面和侧壁上，但是基本上不沉积到介电层的主表面上。

公开(公告)号：US20090017604A1

公开(公告)日：2009-01-15

申请号：US11933742

申请日：2007-11-01

Applicant: Mao-Ying WANG ,  Jer-Chyi WANG ,  Wei-Hui HSU ,  Liang-Pin CHOU ,  Kuo-Hui SU ,  Chang-Rong WU ,  Chao-Sung LAI

Inventor： Mao-Ying WANG ,  Jer-Chyi WANG ,  Wei-Hui HSU ,  Liang-Pin CHOU ,  Kuo-Hui SU ,  Chang-Rong WU ,  Chao-Sung LAI

IPC: H01L21/425

CPC classification number: H01L21/0234 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/2822 ,  H01L21/3105 ,  H01L21/318 ,  H01L29/7833

Abstract: A method for fabricating a semiconductor device is provided. The method for fabricating the semiconductor device comprises providing a substrate. Under an atmosphere containing a fluoride nitride compound, a plasma treatment process is performed to simultaneously fluorinate and nitrify a surface of the substrate. Thereafter, a dielectric layer is formed on the substrate.

Abstract translation: 提供一种制造半导体器件的方法。 制造半导体器件的方法包括提供衬底。 在含有氟化氮化合物的气氛下，进行等离子体处理工艺以同时氟化和硝化基板的表面。 此后，在基板上形成电介质层。

公开(公告)号：US20130052820A1

公开(公告)日：2013-02-28

申请号：US13214244

申请日：2011-08-22

Applicant: Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

Inventor： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC: H01L21/28

CPC classification number: H01L21/321 ,  H01L21/76856 ,  H01L21/76861 ,  H01L21/76876 ,  H01L21/76885

Abstract: A method of forming conductive pattern is provided. A seeding layer is formed on an underlayer. By using an energy ray, an irradiation treatment is performed on a portion of a surface of the seeding layer. The seeding layer thus includes a plurality of irradiated regions and a plurality of unirradiated regions. A conversion treatment is performed on the irradiated regions of the seeding layer. A selective growth process is performed, so as to form a conductive pattern on each unirradiated region of the seeding layer. The irradiated regions of the seeding layer are removed, so that the conductive patterns are insulated from each other.

Abstract translation: 提供形成导电图案的方法。 在底层上形成接种层。 通过使用能量射线，对接种层的表面的一部分进行照射处理。 因此，接种层包括多个照射区域和多个未照射区域。 对接种层的照射区域进行转化处理。 进行选择性生长处理，以在接种层的每个未照射区域上形成导电图案。 去除接种层的照射区域，使得导电图案彼此绝缘。

公开(公告)号：US20120276731A1

公开(公告)日：2012-11-01

申请号：US13095291

申请日：2011-04-27

Applicant: Kuo Hui Su ,  Yi Nan Chen ,  Hsien Wen Liu

Inventor： Kuo Hui Su ,  Yi Nan Chen ,  Hsien Wen Liu

IPC: H01L21/28

CPC classification number: H01L21/02326 ,  H01L21/02332 ,  H01L21/28185 ,  H01L21/28202

Abstract: A method for fabricating a gate dielectric layer comprises the steps of: forming a dielectric layer on a semiconductor substrate; performing a nitrogen treating process to form a nitride layer on the dielectric layer; and performing a thermal treating process at 1150-1400° C. for a period of 400-800 milliseconds, to form a gate dielectric layer. A step of forming a gate layer on the gate dielectric layer may be performed to form a gate structure.

Abstract translation: 一种用于制造栅极电介质层的方法包括以下步骤：在半导体衬底上形成电介质层; 进行氮处理工艺以在介电层上形成氮化物层; 并在1150-1400℃下进行400-800毫秒的热处理工艺以形成栅介质层。 可以在栅极介质层上形成栅极层的步骤以形成栅极结构。

公开(公告)号：US20120273950A1

公开(公告)日：2012-11-01

申请号：US13095209

申请日：2011-04-27

Applicant: Kuo Hui Su ,  Yi Nan Chen ,  Hsien Wen Liu

Inventor： Kuo Hui Su ,  Yi Nan Chen ,  Hsien Wen Liu

IPC: H01L23/485 ,  H01L21/283

CPC classification number: H01L23/53223 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76856 ,  H01L21/76867 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit structure including a copper-aluminum interconnect with a CuSiN layer and a method for fabricating the same are provided. The method for fabricating an integrated circuit structure including a copper-aluminum interconnect according to the present invention comprises the steps of providing a copper (Cu) layer; forming a barrier layer including a CuSiN layer on the copper layer; forming a wetting layer on the barrier layer; and forming an aluminum (Al) layer on the wetting layer.

Abstract translation: 提供了包括具有CuSiN层的铜 - 铝互连的集成电路结构及其制造方法。 根据本发明的包括铜 - 铝互连的集成电路结构的制造方法包括提供铜（Cu）层的步骤; 在铜层上形成包含CuSiN层的阻挡层; 在阻挡层上形成润湿层; 并在润湿层上形成铝（Al）层。

公开(公告)号：US07022603B2

公开(公告)日：2006-04-04

申请号：US10683612

申请日：2003-10-10

Applicant: Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

Inventor： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

IPC: H01L21/44

CPC classification number: H01L21/28052 ,  H01L29/4933

Abstract: A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon layer, and then a tungsten nitride layer is formed overlying the titanium layer. The tungsten nitride layer is annealed using nitrogen and hydrogen gases. A tungsten layer and a cap layer are successively formed overlying the tungsten nitride layer.

Abstract translation: 一种半导体制造方法，该半导体器件具有堆叠栅极结构。 通过介电层与衬底绝缘的衬底上形成多晶硅层。 在多晶硅层上形成金属闪光层，然后在钛层上形成氮化钨层。 使用氮气和氢气对氮化钨层进行退火。 依次形成覆盖氮化钨层的钨层和覆盖层。