Abstract:
A first softstart signal indicates operation in a load phase for a boost rectifier and a second softstart signal indicates operation in a pulse drive phase which follows the load phase. A rectification transistor is actuated for the duration of the load phase in response to the first softstart circuit to generate a rising output voltage. The rectification transistor is further repeatedly actuated during the pulse drive phase in response to the second softstart circuit to generate a boosted output voltage. A first transistor coupled between a first conduction terminal and a body terminal of the rectification transistor is actuated, and a second transistor coupled between the body terminal and a second conduction terminal of the rectification transistor is deactuated, during the load phase. The first transistor is deactuated, and the second transistor is actuated, during the pulse drive phase.
Abstract:
A current source circuit is configured to receive a reference current at the input circuit path of a current mirror circuit. The current mirror circuit mirrors the reference current and generates mirror currents at a number of output circuit paths. A corresponding number of control transistors are connected in series with the output circuit paths. Each control transistor is selectively actuated in response to a control signal. A decoder circuit is configured to receive a variable control signal and generate actuation signals in response thereto to selective actuate the control transistors to pass the mirror current to an output node. At the output node, the passed mirror currents are summed to generate a variable output current. The variable current is monotonically modulated in response to the variable control signal.
Abstract:
A class-D audio amplifier incorporates an overcurrent protection scheme implementing two overcurrent thresholds to avoid a dynamic impedance drop. When output current reaches the first threshold as a result of an impedance drop across the speaker, the overcurrent protection circuitry limits the output current to the value of the first threshold, but does not shut down the circuit. The second threshold is used to detect an overcurrent condition to shut down the circuit. Current limiting logic of a first channel monitors the overcurrent condition of a second channel and controls the first channel output in response thereto. This permits the second channel output current to reach the second threshold if the circuit is experiencing a short-circuit condition. This scheme also allows the output current to drop below the first threshold if the overcurrent condition of the second channel is caused by an impedance drop across the output speaker.
Abstract:
An electronic device may include first and second laterally spaced apart interconnect substrates defining a slotted opening, and a first IC in the slotted opening and electrically coupled to one or more of the first and second interconnect substrates. The electronic device may include a first other IC over the first IC and electrically coupled to one or more of the first and second interconnect substrates, and encapsulation material over the first and second interconnect substrates, the first IC, and the first other IC.
Abstract:
An oscillator module includes a first MOS transistor and a capacitor. The capacitor is coupled between a gate and source of the first MOS transistor. The drain of the first MOS transistor receives a first bias current and generates an oscillating output signal. A switching circuit operates in response to the oscillating output signal to selective charge and discharge the capacitor. A current sourcing circuit is configured to generate the bias current. The current sourcing circuit includes a second MOS transistor which has an identical layout to the first MOS transistor and receives a second bias current. A resistor is coupled between a gate and source of the second MOS transistor. The current sourcing circuit further includes a current mirror having an input configured to receive a reference current passing through the resistor and generate the first and second bias currents.
Abstract:
A high side driver circuit includes a driver stage having an input, an output, a first power terminal and a second power terminal, a transistor having a first power terminal, a second power terminal, and a control terminal coupled to the output of the driver stage, and a switch coupled between the second power terminal of the driver stage and the second power terminal of the transistor.
Abstract:
A driving apparatus configured to drive a light emitting device includes a driving current source module operable to supply current to the light emitting device via a node during operation. A protection module coupled to the node and the driving current source module selectively injects current to the node during operation. The driving current source module is controlled based on a detection result of a voltage on the node.
Abstract:
A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.
Abstract:
A driving circuit includes a controller, a converter and a feedback module. The controller receives an input supply at a supply node, and generates a control signal according to the input supply. The converter receive an input signal at an input node and a control signal at a control node, and is configured to convert the input signal to a driving signal in response to the control signal. The driving signal of the converter is feedback by the feedback module to the controller. The input supply is generated from the input signal or the feedback driving signal. The drive circuit may drive a display device.
Abstract:
A three-phase load is powered by a PWM (e.g., SVPWM) driven DC-AC inverter having a single shunt-topology. A shunt voltage and a branch voltage of the inverter (across a transistor to be calibrated) are measured during a second period of each SVPWM sector, and the drain-to-source resistance of the calibrated transistor is calculated. During the fourth period of each SVPWM sector, the branch voltage is measured again, and another branch voltage across another transistor is measured. Using the drain-to-source resistance of the calibrated transistor and the voltage across the calibrated transistor measured during the fourth period, the phase current through the calibrated transistor is calculated. Using the other branch voltage measured during the fourth period and the drain-to-source resistance of its corresponding transistor (known from a prior SVPWM sector), the phase current through that transistor is calculated. From the two calculated phase currents, the other phase current can be calculated.