公开(公告)号：US12072754B2

公开(公告)日：2024-08-27

申请号：US17485199

申请日：2021-09-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander J. Branover ,  Christopher T. Weaver ,  Indrani Paul ,  Benjamin Tsien ,  Mihir Shaileshbhai Doctor ,  Stephen V. Kosonocky ,  John P. Petry ,  Thomas J. Gibney

IPC: G06F1/00 ,  G06F1/3296

CPC classification number: G06F1/3296

Abstract: A method and apparatus for managing a controller includes indicating, by a processor of a first device, to the controller of a second device to enter a second power state from a first power state. The controller of the second device responds to the processor of the first device with a confirmation. The processor of the first device transmits a signal to the controller of the second device to enter the second power state. Upon receiving a wake event, the controller of the second device exits the second device from the second power state to the first power state.

公开(公告)号：US11703937B2

公开(公告)日：2023-07-18

申请号：US17483698

申请日：2021-09-23

Applicant: Advanced Micro Devices, Inc.

Inventor： Mihir Shaileshbhai Doctor ,  Alexander J. Branover ,  Benjamin Tsien ,  Indrani Paul ,  Christopher T. Weaver ,  Thomas J. Gibney ,  Stephen V. Kosonocky ,  John P. Petry

IPC: G06F1/32 ,  G06F1/3287 ,  G06F1/3296 ,  G06F1/3234

CPC classification number: G06F1/3287 ,  G06F1/3265 ,  G06F1/3278 ,  G06F1/3296

Abstract: Devices and methods for linear addressing are provided. A device is provided which comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the components. The power management controller is configured to send one of a request to remove power to the components and a request to reduce power to the components when it is determined that the components are idle, execute a first process of one of removing power and reducing power to the components and entering a reduced power state when an acknowledgement of the request is received and execute a second process of restoring power to the components when one or more of the components are indicated to be active.

公开(公告)号：US20230090126A1

公开(公告)日：2023-03-23

申请号：US17483694

申请日：2021-09-23

Applicant: Advanced Micro Devices, Inc.

Inventor： Benjamin Tsien ,  Alexander J. Branover ,  Christopher T. Weaver ,  Indrani Paul ,  Mihir Shaileshbhai Doctor ,  John P. Petry ,  Stephen V. Kosonocky ,  Thomas J. Gibney ,  Jose G. Cruz ,  Pravesh Gupta ,  Chintan S. Patel

IPC: G06F1/3234 ,  G06F11/14 ,  G06F3/06

Abstract: Devices and methods for transitioning between power states of a device are provided. A program is executed using data stored in configuration registers assigned to a component of a device. For a first reduced power state, data of a first portion of the configuration registers is saved to the memory using a first set of linear address space. For a second reduced power state, data of a second portion of the configuration registers is saved to the memory using a second set of linear address space and data of a third portion of the configuration registers is saved to the memory using a third set of linear address space.

公开(公告)号：US20230031388A1

公开(公告)日：2023-02-02

申请号：US17390429

申请日：2021-07-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Benjamin Tsien ,  Indrani Paul ,  Alexander J. Branover ,  Thomas J. Gibney ,  Mihir Shaileshbhai Doctor ,  John P. Petry ,  Stephen V. Kosonocky ,  Christopher T. Weaver

IPC: G06F1/3203

Abstract: Systems, methods, and devices for integrated circuit power management. A mode of a power management state is entered, from the power management state, in response to an entry condition of the mode. A device that is otherwise powered off in the power management state is powered on in the mode of the power management state. In some implementations, the device includes a communications path between a second device and a third device. In some implementations, the device is in a power domain that is powered off in the power management state. In some implementations, the power domain is powered off in the mode. In some implementations, the device is powered on in the mode via a power rail that is specific to the mode. In some implementations, the entry condition of the mode includes an amount of data stored for display in a display buffer falling below a threshold amount.

公开(公告)号：US10547273B2

公开(公告)日：2020-01-28

申请号：US15796048

申请日：2017-10-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Ravinder Reddy Rachala ,  Stephen V. Kosonocky

IPC: G01K7/01 ,  H03K3/03 ,  H03B5/04

Abstract: A temperature sensor has a first transistor with a gate voltage tied to maintain the first transistor in an off state with leakage current flowing through the transistor, the leakage current varying with temperature. A second transistor is coupled to the first transistor and receives a gate voltage to keep the second transistor in an on state. A current mirror mirrors the leakage current and supplies a mirrored current used to control a frequency of an oscillator signal varies with the mirrored current. The temperature of the first transistor is determined based the frequency of the oscillator signal.

公开(公告)号：US10382014B2

公开(公告)日：2019-08-13

申请号：US15390397

申请日：2016-12-23

Applicant: ATI TECHNOLOGIES ULC ,  Advanced Micro Devices, Inc.

Inventor： Joyce Cheuk Wai Wong ,  Dragoljub Ignjatovic ,  Mikhail Rodionov ,  Ljubisa Bajic ,  Stephen V. Kosonocky ,  Steven J. Kommrusch

IPC: H03K3/03 ,  H03K3/012 ,  H03K3/013 ,  H03K3/0231 ,  H03K5/1534 ,  H03K5/15 ,  H03L5/00 ,  H03L7/099 ,  H03L1/02 ,  H03L7/085

Abstract: An output clock frequency of an adaptive oscillator circuit changes in response to noise on an integrated circuit power supply line. The circuit features two identical delay lines which are separately connected to a regulated supply and a droopy supply. In response to noise on the droopy supply, the delay lines cause a change in the output clock frequency. The adaptive oscillator circuit slows down the output clock frequency when the droopy supply droops or falls below the regulated supply. The adaptive oscillator circuit clamps the output clock frequency at a level determined by the regulated supply when the droopy supply overshoots or swings above the regulated supply.

公开(公告)号：US20190199363A1

公开(公告)日：2019-06-27

申请号：US15850593

申请日：2017-12-21

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Stephen V. Kosonocky ,  Mikhail Rodionov ,  Joyce C. Wong

IPC: H03L7/099 ,  G06F1/08

CPC classification number: H03L7/0992 ,  G06F1/08 ,  H03B1/04 ,  H03K3/0307 ,  H03K3/0372 ,  H03K2005/00071

Abstract: A master/slave configuration of a frequency locked Loop (FLL) decouples the process, target voltage, temperature (PVT) tracking goals of locking the loop from adapting the clock frequency in response to voltage droops in the supply. A master oscillator circuit receives a regulated supply voltage and supplies a master oscillator signal. A control circuit supplies a master frequency control signal to control a frequency of the master oscillator signal to a target frequency. A slave oscillator circuit is coupled to a regulated supply voltage and a droopy supply voltage and supplies a slave oscillator signal having a frequency responsive to a slave frequency control signal that is based on the master frequency control signal. The frequency of the second oscillator signal is further responsive to a voltage change of the droopy supply voltage.

公开(公告)号：US20190131928A1

公开(公告)日：2019-05-02

申请号：US15796048

申请日：2017-10-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Ravinder Reddy Rachala ,  Stephen V. Kosonocky

IPC: H03B5/04 ,  H03K3/03 ,  G01K7/01

Abstract: A temperature sensor has a first transistor with a gate voltage tied to maintain the first transistor in an off state with leakage current flowing through the transistor, the leakage current varying with temperature. A second transistor is coupled to the first transistor and receives a gate voltage to keep the second transistor in an on state. A current mirror mirrors the leakage current and supplies a mirrored current used to control a frequency of an oscillator signal varies with the mirrored current. The temperature of the first transistor is determined based the frequency of the oscillator signal.

公开(公告)号：US10197455B2

公开(公告)日：2019-02-05

申请号：US14716064

申请日：2015-05-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Stephen V. Kosonocky

IPC: G01K7/01 ,  G01K7/16 ,  G01K13/00 ,  H03K3/0231 ,  G01K7/32

Abstract: A temperature dependent oscillator charges a capacitance from a voltage source through a switch. The switch is opened and the capacitance discharges through a transistor having a temperature dependent resistance. The voltage across the capacitance is compared to a predetermined threshold voltage. The comparator asserts a compare signal when the capacitance discharges to a predetermined voltage level. The switch is then closed for a long enough time to recharge the capacitor and then the switch is opened to allow the capacitance to discharge through the transistor. The charging and discharging repeats with a frequency that is exponentially related to temperature. A counter counts the oscillations over a predetermined time period. The count value is processed using a natural log function resulting in a thermal value corresponding to temperature. The thermal value may be corrected for supply voltage errors.

公开(公告)号：US10120430B2

公开(公告)日：2018-11-06

申请号：US15258816

申请日：2016-09-07

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Stephen V. Kosonocky ,  Thomas Burd ,  Adam Clark ,  Larry D. Hewitt ,  John Vincent Faricelli ,  John P. Petry

IPC: G06F1/32 ,  G01R31/28 ,  G06F11/00 ,  G06F11/34

Abstract: A system and method for managing operating modes within a semiconductor chip for optimal power and performance while meeting a reliability target are described. A semiconductor chip includes a functional unit and a corresponding reliability monitor. The functional unit provides actual usage values to the reliability monitor. The reliability monitor determines expected usage values based on a reliability target and the age of the semiconductor chip. The reliability monitor compares the actual usage values and the expected usage values. The result of this comparison is used to increase or decrease current operational parameters.