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    Fabrication and use of dose maps and feature size maps during substrate processing
    31.
    发明授权
    Fabrication and use of dose maps and feature size maps during substrate processing 有权

    公开(公告)号：US10509328B2

    公开(公告)日：2019-12-17

    申请号：US15964986

    申请日：2018-04-27

    Applicant: Applied Materials, Inc.

    Inventor： Christopher Dennis Bencher ,  Joseph R. Johnson

    IPC: G03F7/20 ,  G06T7/00

    Abstract: Systems and methods discussed herein relate to patterning substrates during lithography and microlithography to form features to a set or sets of critical dimensions using dose. The dose maps are generated based upon images captured during manufacturing to account for process variation in a plurality of operations employed to pattern the substrates. The dose maps are used along with imaging programs to tune the voltages applied to various regions of a substrate in order to produce features to a set or sets of critical dimensions and compensate for upstream or downstream operations that may otherwise result in incorrect critical dimension formation.

    Digital lithography with extended depth of focus
    32.
    发明授权
    Digital lithography with extended depth of focus 有权

    公开(公告)号：US10474041B1

    公开(公告)日：2019-11-12

    申请号：US16267359

    申请日：2019-02-04

    Applicant: Applied Materials, Inc.

    Inventor： Guoheng Zhao ,  Jeremy Rolfe Nesbitt ,  Christopher Dennis Bencher ,  Mehdi Vaez-Iravani

    IPC: G03B27/72 ,  G03F7/20 ,  G03F9/00 ,  G02B27/10 ,  G02B26/08

    Abstract: The present disclosure generally relates to lithography devices comprising an autofocus system. The autofocus system is configured to individually focus and adjust a plurality of digital micromirror devices. The autofocus system comprises a single light beam and a diffractive optical element configured to split the single light beam into two or more split beams. The two or more split beams are directed to a beam splitter. The two or more split beams are then reflected off the surface of a substrate to at least one position sensor. The position sensor is configured to measure the position of each of the two or more split beams. At least one digital micromirror device is then individually adjusted based on the measured position to adjust the focus of the at least one digital micromirror device with respect to surface height and tilt variations of the substrate.

    Method to reduce line waviness
    33.
    发明授权
    Method to reduce line waviness 有权

    公开(公告)号：US10416550B2

    公开(公告)日：2019-09-17

    申请号：US15936385

    申请日：2018-03-26

    Applicant: Applied Materials, Inc.

    Inventor： Joseph R. Johnson ,  Christopher Dennis Bencher ,  Thomas L. Laidig

    IPC: G03F1/38 ,  G03F7/20 ,  G03F1/70

    Abstract: Embodiments disclosed herein relate to an exposure pattern alteration software application which manipulates exposure polygons having lines with angles substantially close to angles of symmetry of a hex close pack arrangement, which suffer from long jogs. Long jogs present themselves as high edge placement error regions. As such, the exposure pattern alteration software application provides for line wave reduction by serrating polygon edges at affected angles to reduce edge placement errors during maskless lithography patterning in a manufacturing process.

    Pattern generators employing processors to vary delivery dose of writing beams according to photoresist thickness, and associated methods
    35.
    发明授权
    Pattern generators employing processors to vary delivery dose of writing beams according to photoresist thickness, and associated methods 有权

    公开(公告)号：US10012910B2

    公开(公告)日：2018-07-03

    申请号：US15026717

    申请日：2014-06-19

    Applicant: Applied Materials, Inc.

    Inventor： Christopher Dennis Bencher

    IPC: G03B27/42 ,  G03F7/20

    CPC classification number: G03F7/70558 ,  G03F7/702 ,  G03F7/70383 ,  G03F7/70608

    Abstract: Multi-beam pattern generators employing processors to vary delivered dose of writing beams according to photoresist thicknesses, and associated methods are disclosed. A pattern generator may write a pattern upon a substrate having a photoresist which is sensitive to the writing beams. The pattern may be written in respective writing cycles when the writing beams write at least a portion of the pattern at writing pixel locations. A beam actuator of the pattern generator may independently direct the writing beams to the writing pixels to deliver respective pixel doses during each writing cycle. Pixel doses delivered may be adjusted according to a thickness of the photoresist at various writing pixel locations according to one or more approaches, using one or more of: actuator dwell times, emitted pulse duration, emitted pulse frequency, and emitted pulse intensity. In this manner, additional dimensional control is provided for substrates having variable photoresist thicknesses.

    RESIST HARDENING AND DEVELOPMENT PROCESSES FOR SEMICONDUCTOR DEVICE MANUFACTURING
    37.
    发明申请
    RESIST HARDENING AND DEVELOPMENT PROCESSES FOR SEMICONDUCTOR DEVICE MANUFACTURING 审中-公开
    用于半导体器件制造的耐腐蚀和开发工艺

    公开(公告)号：US20160329222A1

    公开(公告)日：2016-11-10

    申请号：US15216521

    申请日：2016-07-21

    Applicant: Applied Materials, Inc.

    Inventor： Peng Xie ,  Christopher Dennis Bencher ,  Huixiong Dai ,  Timothy Michaelson ,  Subhash Deshmukh

    IPC: H01L21/67 ,  H01L21/687 ,  C23C16/455

    CPC classification number: H01L21/67069 ,  C23C16/45544 ,  G03F7/36 ,  G03F7/405 ,  H01L21/67167 ,  H01L21/67201 ,  H01L21/68707

    Abstract: In some embodiments, a method of forming an etch mask on a substrate is provided that includes (1) forming a resist layer on a substrate; (2) exposing one or more regions of the resist layer to an energy source so as to alter at least one of a physical property and a chemical property of the exposed regions; (3) performing a hardening process on the resist layer to increase the etch resistance of first regions of the resist layer relative to second regions of the resist layer, the hardening process including exposing the resist layer to one or more reactive species within an atomic layer deposition (ALD) chamber; and (4) dry etching the resist layer to remove the one or more second regions and to form a pattern in the resist layer. Other embodiments are provided.

    Abstract translation: 在一些实施例中，提供了在衬底上形成蚀刻掩模的方法，其包括（1）在衬底上形成抗蚀剂层; （2）将抗蚀剂层的一个或多个区域暴露于能量源，以便改变暴露区域的物理性质和化学性质中的至少一个; （3）对抗蚀剂层进行硬化处理以提高抗蚀剂层相对于抗蚀剂层的第二区域的第一区域的耐蚀刻性，硬化过程包括将抗蚀剂层暴露于原子层内的一个或多个反应性物质 沉积（ALD）室; 和（4）干蚀刻抗蚀剂层以除去一个或多个第二区域并在抗蚀剂层中形成图案。 提供其他实施例。

    Methods for reducing semiconductor substrate strain variation
    38.
    发明授权
    Methods for reducing semiconductor substrate strain variation 有权
    减少半导体衬底应变变化的方法

    公开(公告)号：US09484274B2

    公开(公告)日：2016-11-01

    申请号：US14730198

    申请日：2015-06-03

    Applicant: Applied Materials, Inc.

    Inventor： Christopher Dennis Bencher ,  Ehud Tzuri ,  Ellie Y. Yieh

    IPC: H01L21/02 ,  H01L21/66 ,  H01L21/268

    CPC classification number: H01L22/20 ,  H01L21/268 ,  H01L21/2686 ,  H01L22/12

    Abstract: Embodiments of the disclosure provide methods and system for correcting lithographic film stress/strain variations on a semiconductor substrate using laser energy treatment process. In one embodiment, a method for correcting film stress/strain variations on a substrate includes performing a measurement process in a metrology tool on a substrate to obtain a substrate distortion or an overlay error map, determining dose of laser energy in a computing system to correct film stress/strain variations or substrate distortion based on the overlay error map, and providing a laser energy treatment recipe to a laser energy apparatus based on the dose of laser energy determined to correct substrate distortion or film stress/strain variations.

    Abstract translation: 本公开的实施例提供了使用激光能量处理过程来校正半导体衬底上的平版印刷薄膜应力/应变变化的方法和系统。 在一个实施例中，用于校正衬底上的膜应力/应变变化的方法包括在衬底上的测量工具中执行测量过程以获得衬底失真或重叠误差图，确定计算系统中的激光能量的量化以校正 基于覆盖误差图的薄膜应力/应变变化或基板变形，以及基于确定用于校正基板变形或薄膜应力/应变变化的激光能量的剂量，向激光能量装置提供激光能量处理配方。

    RESIST HARDENING AND DEVELOPMENT PROCESSES FOR SEMICONDUCTOR DEVICE MANUFACTURING
    39.
    发明申请
    RESIST HARDENING AND DEVELOPMENT PROCESSES FOR SEMICONDUCTOR DEVICE MANUFACTURING 有权
    用于半导体器件制造的耐腐蚀和开发工艺

    公开(公告)号：US20140263172A1

    公开(公告)日：2014-09-18

    申请号：US14205324

    申请日：2014-03-11

    Applicant: Applied Materials, Inc.

    Inventor： Peng Xie ,  Christopher Dennis Bencher ,  Huixiong Dai ,  Timothy Michaelson ,  Subhash Deshmukh

    IPC: G03F7/36

    CPC classification number: H01L21/67069 ,  C23C16/45544 ,  G03F7/36 ,  G03F7/405 ,  H01L21/67167 ,  H01L21/67201 ,  H01L21/68707

    Abstract: In some embodiments, a method of forming an etch mask on a substrate is provided that includes (1) forming a resist layer on a substrate; (2) exposing one or more regions of the resist layer to an energy source so as to alter at least one of a physical property and a chemical property of the exposed regions; (3) performing a hardening process on the resist layer to increase the etch resistance of first regions of the resist layer relative to second regions of the resist layer, the hardening process including exposing the resist layer to one or more reactive species within an atomic layer deposition (ALD) chamber; and (4) dry etching the resist layer to remove the one or more second regions and to form a pattern in the resist layer. Other embodiments are provided.

    Abstract translation: 在一些实施例中，提供了在衬底上形成蚀刻掩模的方法，其包括（1）在衬底上形成抗蚀剂层; （2）将抗蚀剂层的一个或多个区域暴露于能量源，以便改变暴露区域的物理性质和化学性质中的至少一个; （3）对抗蚀剂层进行硬化处理以提高抗蚀剂层相对于抗蚀剂层的第二区域的第一区域的耐蚀刻性，硬化过程包括将抗蚀剂层暴露于原子层内的一个或多个反应性物质 沉积（ALD）室; 和（4）干蚀刻抗蚀剂层以除去一个或多个第二区域并在抗蚀剂层中形成图案。 提供其他实施例。

    Image stabilization for digital lithography
    40.
    发明授权
    Image stabilization for digital lithography 有权

    公开(公告)号：US12117732B2

    公开(公告)日：2024-10-15

    申请号：US17915056

    申请日：2020-04-29

    Applicant: Applied Materials, Inc.

    Inventor： Thomas L. Laidig ,  Christopher Dennis Bencher

    IPC: G03F7/20 ,  G03F7/00

    CPC classification number: G03F7/70508 ,  G03F7/70291 ,  G03F7/709

    Abstract: The present disclosure provides methods and systems for correcting the shooting of images from a spatial light modulator (SLM) to a substrate, when cross-scan vibrations, including sub-pixel cross-scan vibrations, are present. The methods and systems include shifting a mask pattern on an SLM rotated relative to the in-scan direction of travel on a substrate, shifting along an axis of the SLM to correct for cross-scan vibrations, and either delaying, or accelerating, the shooting of the mask pattern onto the substrate.

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