公开(公告)号：US11827978B2

公开(公告)日：2023-11-28

申请号：US17688258

申请日：2022-03-07

Applicant: ASM IP Holding B.V.

Inventor： Eric Christopher Stevens ,  Bhushan Zope ,  Shankar Swaminathan ,  Charles Dezelah ,  Qi Xie ,  Giuseppe Alessio Verni

IPC: C23C16/34 ,  C23C16/02 ,  C23C16/08 ,  C23C16/455 ,  H01L27/108 ,  H01L21/28 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  G11C5/06 ,  H10B12/00

CPC classification number: C23C16/34 ,  C23C16/0272 ,  C23C16/08 ,  C23C16/45527 ,  C23C16/45553 ,  G11C5/063 ,  H01L21/28088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/7851 ,  H01L29/78696 ,  H10B12/053 ,  H10B12/34 ,  H10B12/488

Abstract: Methods for depositing a molybdenum nitride film on a surface of a substrate are disclosed. The methods may include: providing a substrate into a reaction chamber; and depositing a molybdenum nitride film directly on the surface of the substrate by performing one or more unit deposition cycles of cyclical deposition process, wherein a unit deposition cycle may include, contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, and contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor. Semiconductor device structures including a molybdenum nitride film are also disclosed.

公开(公告)号：US20230357924A1

公开(公告)日：2023-11-09

申请号：US18141125

申请日：2023-04-28

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Charles Dezelah ,  Ren-Jie Chang ,  Qi Xie ,  Perttu Sippola ,  Petri Raisanen

IPC: C23C16/40 ,  C23C16/04 ,  C23C16/44 ,  C23C16/455 ,  H01L21/02 ,  H01L21/768

CPC classification number: C23C16/405 ,  C23C16/045 ,  C23C16/4408 ,  C23C16/45553 ,  H01L21/02175 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/76831

Abstract: Vapor deposition methods and related systems are provided for depositing layers comprising vanadium and oxygen. In some embodiments, the methods comprise contacting a substrate in a reaction space with alternating pulses of a vapor-phase vanadium precursor and a vapor-phase oxygen reactant. The reaction space may be purged, for example, with an inert gas, between reactant pulses. The methods may be used to fill a gap on a substrate surface. Reaction conditions, including deposition temperature and reactant pulse and purge times may be selected to achieve advantageous gap fill properties. In some embodiments, the substrate on which deposition takes place is maintained at a relatively low temperature, for example between about 50° C. and about 185° C.

公开(公告)号：US11637014B2

公开(公告)日：2023-04-25

申请号：US17064041

申请日：2020-10-06

Applicant: ASM IP Holding B.V.

Inventor： Lucas Petersen Barbosa Lima ,  Rami Khazaka ,  Qi Xie

IPC: H01L21/02 ,  C23C16/455 ,  H01L29/08

Abstract: Methods and systems for selectively depositing material, such as doped semiconductor material, are disclosed. An exemplary method includes providing a substrate, comprising a first area comprising a first material and a second area comprising a second material, selectively depositing a first doped semiconductor layer overlying the first material relative to the second material and selectively depositing a second doped semiconductor layer overlying the first doped semiconductor layer relative to the second material.

公开(公告)号：US20230078233A1

公开(公告)日：2023-03-16

申请号：US17989081

申请日：2022-11-17

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Michael Eugene Givens ,  Qi Xie ,  Charles Dezelah ,  Giuseppe Alessio Verni

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092

Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.

公开(公告)号：US11532757B2

公开(公告)日：2022-12-20

申请号：US15726959

申请日：2017-10-06

Applicant: ASM IP Holding B.V.

Inventor： Pauline Calka ,  Qi Xie ,  Dieter Pierreux ,  Bert Jongbloed

IPC: H01L29/792 ,  C23C16/30 ,  H01L27/11582 ,  C23C16/455 ,  H01L27/1157 ,  H01L21/02 ,  C23C16/34 ,  H01L27/11524 ,  H01L27/11551 ,  H01L29/66

Abstract: A semiconductor device and method for manufacturing the semiconductor device are disclosed. Specifically, the semiconductor device may include a charge trapping layer with improved retention and speed for VNAND applications. The charge trapping layer may comprise an aluminum nitride (AlN) or aluminum oxynitride (AlON) layer.

公开(公告)号：US20220285147A1

公开(公告)日：2022-09-08

申请号：US17685525

申请日：2022-03-03

Applicant: ASM IP Holding B.V.

Inventor： Lifu Chen ,  Qi Xie ,  Charles Dezelah ,  Petro Deminskyi ,  Giuseppe Alessio Verni ,  Petri Raisanen ,  Eric James Shero

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/52 ,  C23C16/08

Abstract: Disclosed are methods and systems for depositing layers comprising a titanium, aluminum, and carbon. The layers are formed onto a surface of a substrate. The deposition process comprises a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

公开(公告)号：US20220165575A1

公开(公告)日：2022-05-26

申请号：US17529562

申请日：2021-11-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Giuseppe Alessio Verni ,  Tatiana Ivanova ,  Perttu Sippola ,  Michael Eugene Givens ,  Eric Shero ,  Jiyeon Kim ,  Charles Dezelah ,  Petro Deminskyi ,  Ren-Jie Chang

IPC: H01L21/28 ,  H01L21/02 ,  C23C16/52 ,  C23C16/455

Abstract: Methods and systems for depositing threshold voltage shifting layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a threshold voltage shifting layer onto a surface of the substrate.

公开(公告)号：US20220123131A1

公开(公告)日：2022-04-21

申请号：US17499970

申请日：2021-10-13

Applicant: ASM IP Holding B.V.

Inventor： Oreste Madia ,  Giuseppe Alessio Verni ,  Qi Xie ,  Michael Eugene Givens ,  Varun Sharma ,  Andrea Illiberi

IPC: H01L29/66 ,  H01L21/02

Abstract: Methods and systems for depositing threshold voltage shifting layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a threshold voltage shifting layer onto a surface of the substrate. The threshold voltage shifting layers are particularly useful for metal oxide semiconductor field effect transistors.

公开(公告)号：US11286558B2

公开(公告)日：2022-03-29

申请号：US16992806

申请日：2020-08-13

Applicant: ASM IP Holding B.V.

Inventor： Eric Christopher Stevens ,  Bhushan Zope ,  Shankar Swaminathan ,  Charles Dezelah ,  Qi Xie ,  Giuseppe Alessio Verni

IPC: H01L21/28 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  C23C16/34 ,  C23C16/02 ,  C23C16/08 ,  C23C16/455 ,  H01L27/108 ,  G11C5/06

Abstract: Methods for depositing a molybdenum nitride film on a surface of a substrate are disclosed. The methods may include: providing a substrate into a reaction chamber; and depositing a molybdenum nitride film directly on the surface of the substrate by performing one or more unit deposition cycles of cyclical deposition process, wherein a unit deposition cycle may include, contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, and contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor. Semiconductor device structures including a molybdenum nitride film are also disclosed.

公开(公告)号：US20210335612A1

公开(公告)日：2021-10-28

申请号：US17235985

申请日：2021-04-21

Applicant: ASM IP Holding B.V

Inventor： Petro Deminskyi ,  Charles Dezelah ,  Jiyeon Kim ,  Giuseppe Alessio Verni ,  Maart Van Druenen ,  Qi Xie ,  Petri Räisänen

IPC: H01L21/28 ,  H01L29/49 ,  C23C16/38 ,  C23C16/455 ,  C23C16/50

Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.