公开(公告)号：US20240220265A1

公开(公告)日：2024-07-04

申请号：US18147103

申请日：2022-12-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Sooraj Puthoor ,  Nuwan S. Jayasena

IPC: G06F9/38 ,  G06F9/48 ,  G06F9/50

CPC classification number: G06F9/3836 ,  G06F9/4806 ,  G06F9/5061

Abstract: Resource access control is described. In accordance with the described techniques, a process (e.g., an application process, a system process, etc.) issues an instruction seeking access to a computation resource (e.g., a processor resource, a memory resource, etc.) to perform a computation task. An execution context for the instruction is checked to determine whether the execution context includes a resource indicator indicating permission to access the processor resource. Alternatively or additionally, the instruction is checked against an access table which identifies processes that are permitted and/or not permitted to access the computation resource.

公开(公告)号：US20240103860A1

公开(公告)日：2024-03-28

申请号：US17953142

申请日：2022-09-26

Applicant: Advanced Micro Devices, Inc.

Inventor： Nuwan S. Jayasena

IPC: G06F9/30

CPC classification number: G06F9/3004 ,  G06F9/30029

Abstract: Predicates for processing in memory is described. In accordance with the described techniques, a predicate instruction to compute a conditional value based on data stored in a memory is provided to a processing-in-memory component. A response that includes the conditional value computed by the processing-in-memory component is received, and the conditional value is stored in a predicate register. One or more conditional instructions are provided to the processing-in-memory component based on the conditional value stored in the predicate register.

公开(公告)号：US10585826B2

公开(公告)日：2020-03-10

申请号：US15005378

申请日：2016-01-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Nuwan S. Jayasena ,  Andrew G. Kegel

IPC: G06F13/24

Abstract: The described embodiments include a computing device with multiple interrupt processors for processing interrupts. In the described embodiments, each of the multiple processors is classified as one or more processor types based on factors such as features and functionality of the processor, an operating environment of the processor, the characteristics of some or all of the available interrupts, etc. During operation, an interrupt controller in the computing device receives an indication of an interrupt. The interrupt controller then determines a processor type for processing the interrupt. Next, the interrupt controller causes the interrupt to be processed by one of the plurality of processors that is the determined processor type.

公开(公告)号：US10585801B2

公开(公告)日：2020-03-10

申请号：US13685133

申请日：2012-11-26

Applicant: Advanced Micro Devices, Inc.

Inventor： Nuwan S. Jayasena ,  James Michael O'Connor ,  Michael Mantor

IPC: G06F12/08 ,  G06F12/0862 ,  G06F9/52 ,  G06F8/41

Abstract: Embodiments include methods, systems and computer readable media configured to execute a first kernel (e.g. compute or graphics kernel) with reduced intermediate state storage resource requirements. These include executing a first and second (e.g. prefetch) kernel on a data-parallel processor, such that the second kernel begins executing before the first kernel. The second kernel performs memory operations that are based upon at least a subset of memory operations in the first kernel.

公开(公告)号：US20190266252A1

公开(公告)日：2019-08-29

申请号：US16104662

申请日：2018-08-17

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander D. Breslow ,  Nuwan S. Jayasena

IPC: G06F17/30

Abstract: A method includes, for each key of a plurality of keys, identifying from a set of buckets a first bucket for the key based on a first hash function, and identifying from the set of buckets a second bucket for the key based on a second hash function. An entry for the key is stored in a bucket selected from one of the first bucket and the second bucket. The entry is inserted in a sequence of entries in a memory block. A position of the entry in the sequence of entries corresponds to the selected bucket. For each bucket in the set of buckets, an indication of a number of entries in the bucket is recorded.

公开(公告)号：US20190013051A1

公开(公告)日：2019-01-10

申请号：US16129252

申请日：2018-09-12

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Nuwan S. Jayasena ,  Gabriel H. Loh ,  Bradford M. Beckmann ,  James M. O'Connor ,  Lisa R. Hsu

IPC: G11C5/06 ,  G06F13/16 ,  G06F12/02 ,  G06F12/10 ,  G11C7/10

CPC classification number: G11C5/06 ,  G06F12/02 ,  G06F12/10 ,  G06F13/1694 ,  G11C7/1006

Abstract: A system, method, and computer program product are provided for a memory device system. One or more memory dies and at least one logic die are disposed in a package and communicatively coupled. The logic die comprises a processing device configurable to manage virtual memory and operate in an operating mode. The operating mode is selected from a set of operating modes comprising a slave operating mode and a host operating mode.

公开(公告)号：US20180115496A1

公开(公告)日：2018-04-26

申请号：US15331002

申请日：2016-10-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Yasuko Eckert ,  Onur Kayiran ,  Nuwan S. Jayasena ,  Gabriel H. Loh ,  Dong Ping Zhang

IPC: H04L12/911 ,  H04L12/863

CPC classification number: H04L47/70 ,  G06F9/5066 ,  H04L47/50 ,  H04L67/10 ,  H04L67/2842 ,  Y02D10/22 ,  Y02D10/36

Abstract: Systems, apparatuses, and methods for implementing mechanisms to improve data locality for distributed processing units are disclosed. A system includes a plurality of distributed processing units (e.g., GPUs) and memory devices. Each processing unit is coupled to one or more local memory devices. The system determines how to partition a workload into a plurality of workgroups based on maximizing data locality and data sharing. The system determines which subset of the plurality of workgroups to dispatch to each processing unit of the plurality of processing units based on maximizing local memory accesses and minimizing remote memory accesses. The system also determines how to partition data buffer(s) based on data sharing patterns of the workgroups. The system maps to each processing unit a separate portion of the data buffer(s) so as to maximize local memory accesses and minimize remote memory accesses.

公开(公告)号：US20180113797A1

公开(公告)日：2018-04-26

申请号：US15299990

申请日：2016-10-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander D. Breslow ,  Nuwan S. Jayasena ,  Dong Ping Zhang

IPC: G06F11/36 ,  G06F9/44 ,  G06F9/30

CPC classification number: G06F11/3688 ,  G06F8/71 ,  G06F9/30101 ,  G06F9/448 ,  G06F9/4843 ,  G06F9/5088

Abstract: Systems, apparatuses, and methods for migrating execution contexts are disclosed. A system includes a plurality of processing units and memory devices. The system is configured to execute any number of software applications. The system is configured to detect, within a first software application, a primitive for migrating at least a portion of the execution context of a source processing unit to a target processing unit, wherein the primitive includes one or more instructions. The execution context includes a plurality of registers. A first processing unit is configured to execute the one or more instructions of the primitive to cause a portion of an execution context of the first processing unit to be migrated to a second processing unit. In one embodiment, executing the primitive instruction(s) causes an instruction pointer value, with an optional offset value, to be sent to the second processing unit.

公开(公告)号：US20180107598A1

公开(公告)日：2018-04-19

申请号：US15295025

申请日：2016-10-17

Applicant: Advanced Micro Devices, Inc.

Inventor： Andreas Prodromou ,  Mitesh R. Meswani ,  Arkaprava Basu ,  Nuwan S. Jayasena ,  Gabriel H. Loh

IPC: G06F12/0811

CPC classification number: G06F12/0811 ,  G06F9/5027

Abstract: Cluster manager functional blocks perform operations for migrating pages in portions in corresponding migration clusters. During operation, each cluster manager keeps an access record that includes information indicating accesses of pages in the portions in the corresponding migration cluster. Based on the access record and one or more migration policies, each cluster manager migrates pages between the portions in the corresponding migration cluster.

公开(公告)号：US20180074715A1

公开(公告)日：2018-03-15

申请号：US15264400

申请日：2016-09-13

Applicant: Advanced Micro Devices, Inc.

Inventor： Amin Farmahini-Farahani ,  Alexander D. Breslow ,  Nuwan S. Jayasena

IPC: G06F3/06 ,  G06F12/1009

Abstract: Systems, apparatuses, and methods for determining preferred memory page management policies by software are disclosed. Software executing on one or more processing units generates a memory request. Software determines the preferred page management policy for the memory request based at least in part on the data access size and data access pattern of the memory request. Software conveys an indication of a preferred page management policy to a memory controller. Then, the memory controller accesses memory for the memory request using the preferred page management policy specified by software.