Frequency synthesizer utilizing phase shifted control signals
    31.
    发明授权
    Frequency synthesizer utilizing phase shifted control signals 有权
    频率合成器利用相移控制信号

    公开(公告)号:US06317006B1

    公开(公告)日:2001-11-13

    申请号:US09621803

    申请日:2000-07-21

    Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock by using a shift register. The shift register may be clocked by another clock signal at a higher frequency than the divided version of the VCO output clock. The phase differences between the plurality of phase shifted signals and a divided version of a reference clock may then be detected and converted to the analog control signals.

    Abstract translation: 用于合成诸如无线通信信号的高频信号的方法和装置包括具有可变电容电压控制振荡器(VCO)的锁相环(PLL)频率合成器,其具有连续变量的离散可变电容 电容。 离散可变电容可以提供可变电容的粗调谐调整,以补偿电容器和电感器公差,并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整,以将输出频率聚焦以精确地匹配期望的频率输出。 在微调调整期间,PLL可以由多个模拟控制信号控制。 可以通过使用移位寄存器首先从VCO输出时钟的分割版本生成多个相移信号来导出模拟控制信号。 移位寄存器可以以比VCO输出时钟的分频版本更高的频率由另一个时钟信号来计时。 然后可以检测多个相移信号和参考时钟的分割版本之间的相位差并转换成模拟控制信号。

    Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications
    32.
    发明授权
    Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications 失效
    用于操作用于合成用于无线通信的高频信号的PLL的方法和装置

    公开(公告)号:US06308055B1

    公开(公告)日:2001-10-23

    申请号:US09087486

    申请日:1998-05-29

    Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock. Second, the phase differences between the plurality of phase shifted signals and a divided version of a reference clock may be detected and then converted to the analog control signals.

    Abstract translation: 用于合成诸如无线通信信号的高频信号的方法和装置包括具有可变电容电压控制振荡器(VCO)的锁相环(PLL)频率合成器,其具有连续变量的离散可变电容 电容。 离散可变电容可以提供可变电容的粗调谐调整,以补偿电容器和电感器公差,并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整,以将输出频率聚焦以精确地匹配期望的频率输出。 在微调调整期间,PLL可以由多个模拟控制信号控制。 可以通过首先从VCO输出时钟的分割版本产生多个相移信号来导出模拟控制信号。 第二,可以检测多个相移信号和参考时钟的分割版本之间的相位差,然后转换成模拟控制信号。

    Method and apparatus for operating a PLL with a phase detector/sample
hold circuit for synthesizing high-frequency signals for wireless
communications
    33.
    发明授权
    Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications 失效
    用于使用用于合成用于无线通信的高频信号的相位检测器/采样保持电路来操作PLL的方法和装置

    公开(公告)号:US6167245A

    公开(公告)日:2000-12-26

    申请号:US087017

    申请日:1998-05-29

    Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may include an analog control loop in which a phase detector circuit and sample and hold circuit are utilized. The output of the sample and hold circuit may be provided to the PLL VCO as VCO input control signals.

    Abstract translation: 用于合成诸如无线通信信号的高频信号的方法和装置包括具有可变电容电压控制振荡器(VCO)的锁相环(PLL)频率合成器,其具有连续变量的离散可变电容 电容。 离散可变电容可以提供可变电容的粗调谐调整,以补偿电容器和电感器公差,并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整,以将输出频率聚焦以精确地匹配期望的频率输出。 在微调调整期间,PLL可以包括其中利用相位检测器电路和采样和保持电路的模拟控制回路。 采样保持电路的输出可以作为VCO输入控制信号提供给PLL VCO。

    APPARATUS FOR CAPACITANCE SENSOR WITH INTERFERENCE REJECTION AND ASSOCIATED METHODS
    34.
    发明申请
    APPARATUS FOR CAPACITANCE SENSOR WITH INTERFERENCE REJECTION AND ASSOCIATED METHODS 审中-公开
    具有干扰抑制和相关方法的电容传感器装置

    公开(公告)号:US20120169659A1

    公开(公告)日:2012-07-05

    申请号:US13335407

    申请日:2011-12-22

    Inventor: David R. Welland

    CPC classification number: G06F3/044 G06F3/0416

    Abstract: A method for interfacing with a capacitive touch screen is disclosed. The method includes charging an internal capacitor in the touch screen, which internal capacitor is disposed proximate a fixed location on the touch screen and is capable of changing in response to a touch at that location on the touch screen. After charging, value of the charge on the internal capacitor is determined in a manner to reduce effects of interference.

    Abstract translation: 公开了一种用于与电容式触摸屏接口的方法。 该方法包括对触摸屏中的内部电容器进行充电,该内部电容器设置在触摸屏上的固定位置附近,并且能够响应于触摸屏上该位置处的触摸而改变。 充电后,以减少干扰影响的方式确定内部电容器的电荷值。

    Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with programmable current limiting
    35.
    发明授权
    Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with programmable current limiting 失效
    用于连接到具有可编程限流的DC保持电路的电话线路的数字接入配置电路和方法

    公开(公告)号:US07515672B2

    公开(公告)日:2009-04-07

    申请号:US10679013

    申请日:2003-10-03

    CPC classification number: H04L25/06 H04L7/033 H04L25/0266 H04M11/06 H04M19/001

    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable circuit for the DC termination for a variety of international phone standards. The invention may also be utilized with circuitry for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.

    Abstract translation: 可以使用数字直接访问布置(DAA)电路来终止在用户端的电话连接,其提供用于到达和来自电话线的信号的通信路径。 简要描述,DAA为各种国际电话标准的DC终端提供可编程电路。 本发明还可以用于跨电容隔离屏障发送和接收信号的电路。 更具体地,提供了一种DC可编程直流限流模式可用的直流保持电路。 在限流模式下,功率可能会在DAA集成电路外部的器件中耗散。 此外,大部分功率可能会在外部无源器件(如电阻)中消散。

    Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with switchable DC termination impedance
    36.
    发明授权
    Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with switchable DC termination impedance 失效
    用于连接到具有可切换DC终端阻抗的DC保持电路的电话线路的数字接入布置电路和方法

    公开(公告)号:US07362841B2

    公开(公告)日:2008-04-22

    申请号:US10292290

    申请日:2002-11-12

    CPC classification number: H04L25/06 H04L7/033 H04L25/0266 H04M11/06 H04M19/001

    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.

    Abstract translation: 可以使用数字直接访问布置(DAA)电路来终止在用户端的电话连接,其提供用于到达和来自电话线的信号的通信路径。 简要描述,DAA提供用于各种国际电话标准的DC终端的可编程装置。 本发明还可以用于在电容隔离屏障上传输和接收信号的装置。 更具体地,提供了一种DC可编程直流限流模式可用的直流保持电路。 在限流模式下,功率可能会在DAA集成电路外部的器件中耗散。 此外,大部分功率可能会在外部无源器件(如电阻)中消散。

    Ring-detect interface circuitry and method for a communication system
    40.
    发明授权
    Ring-detect interface circuitry and method for a communication system 失效
    振铃检测接口电路和通信系统的方法

    公开(公告)号:US06480602B1

    公开(公告)日:2002-11-12

    申请号:US09034455

    申请日:1998-03-04

    Abstract: Ring-detect interface circuit is disclosed for digital DAA circuitry to provide a plurality of selectable signals, including a ring monitor signal, on a ring-detect output pin. The interface circuitry allows the digital DAA circuitry to interface with advanced controllers, such as advanced DSPs, while still being compatible with older controllers that expect only a ring monitor signal on the ring-detect pin. The interface circuitry may include a multiplexer that receives multiple status bits or signals, including the ring monitor signal, and that has its output controlled by a multiple-bit control register. In addition, the ring monitor signal may be communicated as a digital signal across an isolation barrier from phone line side circuitry to powered side circuitry and ultimately made available on the ring-detect output pin. Corresponding methods for improving compatibility of digital DAA circuitry through the ring-detect interface circuit are also disclosed.

    Abstract translation: 公开了用于数字DAA电路的振铃检测接口电路,以在环形检测输出引脚上提供包括环形监视器信号的多个可选信号。 接口电路允许数字DAA电路与高级控制器(例如高级DSP)进行接口,同时仍然与仅在环检测引脚上只有环形监视器信号的旧控制器兼容。 接口电路可以包括多路复用器,其接收包括环形监视器信号的多个状态位或信号,并且其多个位控制寄存器控制其输出。 此外,环形监视器信号可以作为数字信号通过隔离屏障从电话线侧电路传送到电源侧电路,并最终在环路检测输出引脚上可用。 还公开了通过环形检测接口电路提高数字DAA电路的兼容性的相应方法。

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