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    DUAL IN-LINE MEMORY MODULE COVER
    32.
    发明公开
    DUAL IN-LINE MEMORY MODULE COVER 审中-公开

    公开(公告)号：US20230273654A1

    公开(公告)日：2023-08-31

    申请号：US18195072

    申请日：2023-05-09

    Applicant: Intel Corporation

    Inventor： Xiang LI ,  George VERGIS ,  Phil GENG

    IPC: G06F1/18

    CPC classification number: G06F1/181 ,  H05K1/14

    Abstract: A standalone top cover retention mechanism can attach to the top of an array of tall (e.g., 2U) DIMMs to provide structural support. In one example, the DIMM cover is attached to two or more DIMMs without attaching to the chassis. The DIMM cover can mitigate shock and vibration related failures at the DIMM level without significant interference with platform thermal mechanical solutions.

    TRACE DESIGN TO REDUCE THE CONNECTOR CROSSTALK
    34.
    发明申请
    TRACE DESIGN TO REDUCE THE CONNECTOR CROSSTALK 有权

    公开(公告)号：US20220418090A1

    公开(公告)日：2022-12-29

    申请号：US17897043

    申请日：2022-08-26

    Applicant: Intel Corporation

    Inventor： Landon HANKS ,  Xiang LI ,  George VERGIS ,  James A. McCALL

    IPC: H05K1/02 ,  H01R12/72 ,  H01R12/73 ,  H05K1/11 ,  H05K1/18 ,  H05K3/10

    Abstract: Examples described herein relate to a system that includes: a circuit board comprising a plurality of layers, first and second conductive connections, first and second trace portions, first, second, and third routings, and a via wherein: the first conductive connection is coupled to the first trace portion, the second conductive connection is coupled to the second trace portion, the first routing is formed in a first layer of the plurality of layers, the second routing is formed in a second layer of the plurality of layers, the third routing is formed in the first layer of the plurality of layers, a portion of the first routing overlaps with a portion of the second routing to provide a capacitive region, and the via conductively couples a portion of the second routing overlaps with a portion of the third routing.

    CIRCUIT BOARD TO REDUCE FAR END CROSS TALK
    36.
    发明申请
    CIRCUIT BOARD TO REDUCE FAR END CROSS TALK 有权

    公开(公告)号：US20220304142A1

    公开(公告)日：2022-09-22

    申请号：US17831774

    申请日：2022-06-03

    Applicant: Intel Corporation

    Inventor： Xiang LI ,  Landon HANKS ,  George VERGIS ,  James A. McCALL

    IPC: H05K1/02 ,  H05K3/46

    Abstract: Examples described herein relate to a system that includes: a circuit board comprising a plurality of layers and at least one conductive connection. In some examples, the at least one conductive connection is connected to a layer of the plurality of layers. In some examples, at least one layer of the plurality of layers comprises a conductive material. In some examples, the at least two layers of the plurality of layers comprise conductive material that extend in an axis towards the at least one conductive connection but do not overlap with the at least one layer of the plurality of layers comprising the conductive material.

    SIGNAL TRACE CONFIGURATION TO REDUCE CROSS TALK
    37.
    发明申请
    SIGNAL TRACE CONFIGURATION TO REDUCE CROSS TALK 有权

    公开(公告)号：US20210327799A1

    公开(公告)日：2021-10-21

    申请号：US17326946

    申请日：2021-05-21

    Applicant: Intel Corporation

    Inventor： Xiang LI

    IPC: H01L23/498 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

    Abstract: Examples described herein relate to an apparatus comprising: a trace comprising a portion routed at least 180 degrees around a perimeter of a pad, wherein the portion is coupled to the pad. In some examples, wherein a cross-sectional shape of the portion routed at least 180 degrees around a perimeter of the pad is one or a combination of: circular, elliptical, square, rectangle, or triangular. In some examples, wherein the portion routed at least 180 degrees around a perimeter of the pad is to increase package inductance and reduce a magnitude of far end cross talk (FEXT). In some examples, wherein the portion routed at least 180 degrees around a perimeter of the pad comprises one or more of: copper, bronze, or an alloy.

    LIQUID COOLED MODULE FOR NARROW PITCH SLOTS
    38.
    发明申请
    LIQUID COOLED MODULE FOR NARROW PITCH SLOTS 有权

    公开(公告)号：US20210321543A1

    公开(公告)日：2021-10-14

    申请号：US17357776

    申请日：2021-06-24

    Applicant: Intel Corporation

    Inventor： Guixiang TAN ,  Xiang LI ,  Jimmy CHUANG ,  Devdatta P. KULKARNI ,  Casey WINKEL ,  Evan A. CHENELLY

    IPC: H05K7/20 ,  G06F1/20 ,  G11C5/04

    Abstract: An apparatus is described. The apparatus includes a module to be inserted into an electronic system. The module includes a first heat exchanger at one end of the module and second heat exchanger at another end of the module. The module also includes a first vapor chamber that runs along respective integrated heat spreaders of semiconductor chips disposed on a first side of the module and a second vapor chamber that runs along respective integrated heat spreaders of semiconductor chips disposed on a second side of the module. The first heat exchanger is in thermal contact with at least one of the first and second vapor chambers, and, the second heat exchanger is in thermal contact with at least one of the first and second vapor chambers.

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