公开(公告)号：US07452791B2

公开(公告)日：2008-11-18

申请号：US11240467

申请日：2005-10-03

申请人： Misako Nakazawa ,  Toshiji Hamatani ,  Naoki Makita

发明人： Misako Nakazawa ,  Toshiji Hamatani ,  Naoki Makita

IPC分类号： H01L21/20

CPC分类号： H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique. If the spin rotational acceleration speed is set low during a period moving from a dripping of the catalyst element solution process to a high velocity spin drying process in a catalyst element spin addition step, then it becomes clear that the non-uniformity of the amount of added catalyst element within the substrate is improved. The above stated problems are therefore solved by applying a spin addition process with a low spin rotational acceleration to a method of manufacturing a crystalline semiconductor film.

摘要翻译： 催化剂元素的自旋加成方法是简单且非常重要的技术，因为通过控制催化剂元素溶液中的催化剂元素浓度可以容易地添加结晶所需的催化剂元素的最小量，但是存在以下问题： 底物内添加的催化剂元素的量差。 认为衬底内添加的催化剂元素的量的不均匀性会影响已经经过热结晶的结晶半导体膜的结晶度的波动，并且对最终由结晶半导体膜构成的TFT的电特性产生不良影响 。 本发明通过上述传统技术解决了这个问题。 如果在催化剂元素自由添加步骤中从催化剂元素溶液处理的滴落到高速纺丝干燥过程的时间段内将旋转旋转加速度设定为低，则显而易见的是， 衬底内添加的催化剂元素得到改善。 因此，通过对制造结晶半导体膜的方法应用具有低自旋旋转加速度的自旋加成工艺来解决上述问题。

公开(公告)号：US20070241404A1

公开(公告)日：2007-10-18

申请号：US11784965

申请日：2007-04-10

申请人： Misako Nakazawa ,  Naoki Makita

发明人： Misako Nakazawa ,  Naoki Makita

IPC分类号： H01L27/092

CPC分类号： H01L27/12 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908

摘要： A catalytic element is added to an amorphous semiconductor film and heat treatment is conducted therefor to produce a crystalline semiconductor film with good quality, a TFT (semiconductor device) with a satisfactory characteristic is realized using the crystalline semiconductor film. A semiconductor layer includes a region containing an impurity element which has a concentration of 1×1019/cm3 to 1×1021/cm3 and belongs to group 15 of the periodic table and an impurity element which has a concentration of 1.5×1019/cm3 to 3×1021/cm3 and belongs to group 13 of the periodic table, and the region is a region to which a catalytic element left in the semiconductor film (particularly, the channel forming region) moves.

摘要翻译： 将催化元素添加到非晶半导体膜中，并进行热处理以产生质量好的结晶半导体膜，使用晶体半导体膜实现具有令人满意的特性的TFT（半导体器件）。 半导体层包括含有浓度为1×10 19 / cm 3至1×10 12 / cm 3的杂质元素的区域 属于周期表第15组，杂质元素浓度为1.5×10 9 / cm 3至3×10 21 / SUP> / cm 3，属于周期表第13族，区域是留在半导体膜（特别是沟道形成区）中的催化元素移动的区域。

公开(公告)号：US07087504B2

公开(公告)日：2006-08-08

申请号：US10133588

申请日：2002-04-29

申请人： Setsuo Nakajima ,  Aiko Shiga ,  Naoki Makita ,  Takuya Matsuo

发明人： Setsuo Nakajima ,  Aiko Shiga ,  Naoki Makita ,  Takuya Matsuo

IPC分类号： H01L21/20

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02609 ,  H01L21/2026 ,  H01L21/6708 ,  H01L21/67167 ,  H01L21/67213 ,  H01L29/66757 ,  H01L29/78675

摘要： A technique for manufacturing TFTs having little dispersion in their electrical characteristics is provided. Contamination of a semiconductor film is reduced by performing oxidation processing having an organic matter removing effect, forming a clean oxide film, after removing a natural oxide film formed on a semiconductor film surface. TFTs having little dispersion in their electrical characteristics can be obtained by using the semiconductor film thus obtained in active layers of the TFTs, and the electrical properties can be improved. In addition, deterioration in productivity and throughput can be reduced to a minimum by using a semiconductor manufacturing apparatus of the present invention.

摘要翻译： 提供了一种用于制造其电特性几乎没有偏差的TFT的技术。 在除去形成在半导体膜表面上的自然氧化物膜之后，通过进行具有有机物去除效果的氧化处理，形成清洁的氧化物膜来减少半导体膜的污染。 通过使用在TFT的有源层中获得的半导体膜，可以获得其电特性几乎没有色散的TFT，并且可以提高电性能。 此外，通过使用本发明的半导体制造装置，可以将生产率和生产量的劣化降低到最小。

公开(公告)号：US06987036B2

公开(公告)日：2006-01-17

申请号：US10209243

申请日：2002-08-01

申请人： Toshiji Hamatani ,  Misako Nakazawa ,  Naoki Makita

发明人： Toshiji Hamatani ,  Misako Nakazawa ,  Naoki Makita

IPC分类号： H01L21/84

CPC分类号： H01L21/02672 ,  C30B1/023 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/2022

摘要： The invention is directed to a countermeasure against a local amorphous region observed as an eddy pattern on a thermally crystallized crystalline silicon film. The local amorphous region is thought to result from a deficiently formed ultra-thin silicon oxide film by ozone water treatment, which causes a local phenomenon of repelling a catalyst element solution during spin coating. This inhibits a uniform addition of a catalyst element. A relationship between an ozone concentration of ozone water and a wait time between the ozone water treatment and the subsequent step of adding the catalyst element is deduced and used for planning the countermeasure against the local amorphous region.

公开(公告)号：US20060009015A1

公开(公告)日：2006-01-12

申请号：US11221773

申请日：2005-09-09

申请人： Setsuo Nakajima ,  Aiko Shiga ,  Naoki Makita ,  Takuya Matsuo

发明人： Setsuo Nakajima ,  Aiko Shiga ,  Naoki Makita ,  Takuya Matsuo

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02609 ,  H01L21/2026 ,  H01L21/6708 ,  H01L21/67167 ,  H01L21/67213 ,  H01L29/66757 ,  H01L29/78675

摘要： A technique for manufacturing TFTs having little dispersion in their electrical characteristics is provided. Contamination of a semiconductor film is reduced by performing oxidation processing having an organic matter removing effect, forming a clean oxide film, after removing a natural oxide film formed on a semiconductor film surface. TFTs having little dispersion in their electrical characteristics can be obtained by using the semiconductor film thus obtained in active layers of the TFTs, and the electrical properties can be improved. In addition, deterioration in productivity and throughput can be reduced to a minimum by using a semiconductor manufacturing apparatus of the present invention.

公开(公告)号：US06951802B2

公开(公告)日：2005-10-04

申请号：US10822820

申请日：2004-04-13

申请人： Misako Nakazawa ,  Toshiji Hamatani ,  Naoki Makita

发明人： Misako Nakazawa ,  Toshiji Hamatani ,  Naoki Makita

IPC分类号： H01L27/08 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L21/36

CPC分类号： H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique. If the spin rotational acceleration speed is set low during a period moving from a dripping of the catalyst element solution process to a high velocity spin drying process in a catalyst element spin addition step, then it becomes clear that the non-uniformity of the amount of added catalyst element within the substrate is improved. The above stated problems are therefore solved by applying a spin addition process with a low spin rotational acceleration to a method of manufacturing a crystalline semiconductor film.

摘要翻译： 催化剂元素的自旋加成方法是简单且非常重要的技术，因为通过控制催化剂元素溶液中的催化剂元素浓度可以容易地添加结晶所需的催化剂元素的最小量，但是存在以下问题： 底物内添加的催化剂元素的量差。 认为衬底内添加的催化剂元素的量的不均匀性会影响已经经过热结晶的结晶半导体膜的结晶度的波动，并且对最终由结晶半导体膜构成的TFT的电特性产生不良影响 。 本发明通过上述传统技术解决了这个问题。 如果在催化剂元素自由添加步骤中从催化剂元素溶液处理的滴落到高速纺丝干燥过程的时间段内将旋转旋转加速度设定为低，则显而易见的是， 衬底内添加的催化剂元素得到改善。 因此，通过对制造结晶半导体膜的方法应用具有低自旋旋转加速度的自旋加成工艺来解决上述问题。

公开(公告)号：US06867077B2

公开(公告)日：2005-03-15

申请号：US10400418

申请日：2003-03-28

申请人： Misako Nakazawa ,  Mitsuhiro Ichijo ,  Toshiji Hamatani ,  Hideto Ohnuma ,  Naoki Makita

发明人： Misako Nakazawa ,  Mitsuhiro Ichijo ,  Toshiji Hamatani ,  Hideto Ohnuma ,  Naoki Makita

IPC分类号： H01L21/20 ,  H01L21/322 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L29/4908 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621

摘要： A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.

摘要翻译： 满足三个要求的“阻挡蚀刻并保护半导体膜免受蚀刻剂作为蚀刻停止剂”的阻挡层，“允许杂质在用于吸气的热处理中自身移动”，形成“具有优异的再现性” 并且用于吸收包含在半导体膜中的杂质。 阻挡层是氧化硅膜，阻挡层中含有的副氧化物的比例为18％以上。

公开(公告)号：US06770515B1

公开(公告)日：2004-08-03

申请号：US09660516

申请日：2000-09-12

申请人： Naoki Makita ,  Masao Moriguchi

发明人： Naoki Makita ,  Masao Moriguchi

IPC分类号： H01L2100

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02675 ,  H01L21/2022 ,  H01L21/2026 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78675

摘要： A TFT 123 formed on a glass substrate 101 has a crystalline silicon film 108 that serves as an active region. The crystalline silicon film 108 is formed by forming an a-Si film 103 containing hydrogen on the glass substrate 101, thereafter adding nickel 104 to the surface of the a-Si film 103 and subjecting the a-Si film 103 to which the nickel 104 has been added to heat treatment. The crystal grain size of each crystal of the crystalline silicon film 108 is smaller than the size of the channel region of a TFT 123. With this arrangement, a high-performance semiconductor device that has stable characteristics with little characteristic variation and a high integration density and is simply fabricated with high yield can be provided.

摘要翻译： 形成在玻璃基板101上的TFT123具有作为活性区域的结晶硅膜108。 通过在玻璃基板101上形成含有氢的a-Si膜103，然后将镍104加入到a-Si膜103的表面，并对其中的镍104 已加入热处理。 结晶硅膜108的每个晶体的晶粒尺寸小于TFT 123的沟道区域的尺寸。通过这种布置，具有稳定特性，几乎没有特征变化和高集成密度的高性能半导体器件 并且可以提供高产量的简单制造。

公开(公告)号：US5821562A

公开(公告)日：1998-10-13

申请号：US452693

申请日：1995-05-30

申请人： Naoki Makita ,  Takashi Funai ,  Yoshitaka Yamamoto ,  Yasuhiro Mitani ,  Katsumi Nomura ,  Tadayoshi Miyamoto ,  Takamasa Kosai

发明人： Naoki Makita ,  Takashi Funai ,  Yoshitaka Yamamoto ,  Yasuhiro Mitani ,  Katsumi Nomura ,  Tadayoshi Miyamoto ,  Takamasa Kosai

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L29/04 ,  H01L29/06 ,  H01L31/036

CPC分类号： H01L21/2022 ,  H01L27/1277 ,  H01L29/66757 ,  Y10S148/016

摘要： Into an amorphous silicon film, catalyst elements for accelerating the crystallization are introduced. After patterning the amorphous silicon films in which the catalyst elements have been introduced into an island pattern, a heat treatment for the crystallization is conducted. Thus, the introduced catalyst elements efficiently diffuse only inside the island-patterned amorphous silicon films. As a result, a high-quality crystalline silicon film, having the crystal growth direction aligned in one direction and having no grain boundaries, is obtained. Using the thus formed crystalline silicon film, semiconductor devices having a high performance and stable characteristics are fabricated efficiently over the entire substrate, irrespective of the size of the devices.

摘要翻译： 引入非晶硅膜，用于加速结晶的催化剂元素。 在将催化剂元素引入岛状图案的非晶硅膜图案化之后，进行结晶化的热处理。 因此，引入的催化剂元件仅在岛状图案化的非晶硅膜的内部有效地扩散。 结果，获得了晶体生长方向在一个方向上排列并且不具有晶界的高质量晶体硅膜。 使用如此形成的晶体硅膜，无论器件尺寸如何，都能在整个基板上有效地制造具有高性能和稳定特性的半导体器件。

公开(公告)号：US5619044A

公开(公告)日：1997-04-08

申请号：US421910

申请日：1995-04-14

申请人： Naoki Makita ,  Yoshitaka Yamamoto

发明人： Naoki Makita ,  Yoshitaka Yamamoto

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01L29/78654 ,  H01L21/2022 ,  H01L27/1277 ,  G02F1/13454 ,  H01L29/4908

摘要： According to the present invention, a semiconductor device and a method for producing a semiconductor device in which an active region made of a crystalline silicon film is formed on an insulating surface of a substrate is provided. The method includes the steps of: forming a first amorphous silicon film on the substrate; selectively introducing at least one kind of catalyst elements for promoting the crystallization of the first amorphous silicon film into a part of the first amorphous silicon film before or after forming the first amorphous silicon film; heating the first amorphous silicon film so as to crystallize the first amorphous silicon film in a direction substantially parallel to a surface of the substrate with respect to a region surrounding a region into which the catalyst elements are selectively introduced; forming an insulating thin film in a region on the crystalline silicon film in which crystals are grown in a direction substantially parallel to the surface of the substrate so as to partially remove the insulating thin film and the crystalline silicon film so that a linear boundary is formed along a crystal-growing direction of the crystalline silicon film; forming a second amorphous silicon film on the crystalline silicon film; and crystallizing the second amorphous silicon film by heating or by irradiating a laser beam or an intense light.

摘要翻译： 根据本发明，提供一种半导体器件及其制造方法，其中在基片的绝缘表面上形成由晶体硅膜制成的有源区域的半导体器件。 该方法包括以下步骤：在衬底上形成第一非晶硅膜; 在形成第一非晶硅膜之前或之后，选择性地引入至少一种用于促进第一非晶硅膜在第一非晶硅膜的一部分中的结晶的催化剂元件; 加热所述第一非晶硅膜以使所述第一非晶硅膜相对于选择性地引入所述催化剂元件的区域的区域在基本上平行于所述基板的表面的方向上结晶; 在结晶硅膜上形成绝缘薄膜，其中晶体沿基本上平行于衬底表面的方向生长，从而部分去除绝缘薄膜和晶体硅膜，从而形成线性边界 沿着结晶硅膜的晶体生长方向; 在所述晶体硅膜上形成第二非晶硅膜; 并通过加热或照射激光束或强光使第二非晶硅膜结晶。