公开(公告)号：US07557447B2

公开(公告)日：2009-07-07

申请号：US11702074

申请日：2007-02-05

申请人： Tatsuya Usami ,  Koichi Ohto

发明人： Tatsuya Usami ,  Koichi Ohto

IPC分类号： H01L23/48

CPC分类号： H01L23/53238 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

摘要： An improved migration resistance of the interconnect is provided and a diffusion of silicon into the inside of the interconnect is suppressed. A semiconductor device includes a silicon substrate, a first insulating film provided on the silicon substrate and composed of an SiCN film, an SiOC film and an SiO2 film, and a first copper interconnect provided in the first insulating film and essentially composed of a copper-containing metal. An Si—O unevenly distributed layer doped with injected silicon is included in the vicinity of the surface in the inside of the first copper interconnect, and injected atomic silicon at least partially creates Si—O bond.

摘要翻译： 提供了互连的改进的耐迁移电阻，并且抑制了硅扩散到互连的内部。 半导体器件包括硅衬底，设置在硅衬底上并由SiCN膜，SiOC膜和SiO 2膜构成的第一绝缘膜，以及设置在第一绝缘膜中并且基本上由铜 - 含金属。 掺杂有注入硅的Si-O不均匀分布层包含在第一铜互连内部表面附近，并且注入的原子硅至少部分地形成Si-O键。

公开(公告)号：US07180191B2

公开(公告)日：2007-02-20

申请号：US11048929

申请日：2005-02-03

申请人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

发明人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76835 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76832

摘要： A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO2 film 212 and a SiCN film 214 formed thereon. The first SiOC film 204 has a barrier metal layer 216 and via 218 formed therein, and the second SiOC film 210 has a barrier metal layer 220 and wiring metal layer 222 formed therein. Carbon content of the second SiOC film 210 is adjusted larger than that of the first SiOC film 204. This makes it possible to improve adhesiveness of the insulating interlayer with other insulating layers, while keeping a low dielectric constant of the insulating interlayer.

摘要翻译： 半导体器件200包括形成在半导体衬底（未示出）上的SiCN膜202，形成在其上的第一SiOC膜204，形成在其上的SiCN膜208，形成在其上的第二SiOC膜210， SUB>膜212和形成在其上的SiCN膜214。 第一SiOC膜204具有形成在其中的阻挡金属层216和通孔218，并且第二SiOC膜210具有形成在其中的阻挡金属层220和布线金属层222。 第二SiOC膜210的碳含量被调整为大于第一SiOC膜204的碳含量。 这使得可以在保持绝缘中间层的低介电常数的同时提高绝缘中间层与其它绝缘层的粘附性。

公开(公告)号：US20060208361A1

公开(公告)日：2006-09-21

申请号：US11368671

申请日：2006-03-07

申请人： Koichi Ohto ,  Tatsuya Usami

发明人： Koichi Ohto ,  Tatsuya Usami

IPC分类号： H01L23/52

CPC分类号： H01L23/5329 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/31633 ,  H01L21/78 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor chip 100 includes a semiconductor substrate (not shown), and a stacked film 150 formed over the semiconductor substrate, which includes carbon-containing insulating films such as a first interlayer insulating film 106, and carbon-free insulating films such as an underlying layer 102 and a top cover film 124. The end faces of the carbon-free insulating films herein are located on the outer side of the end faces of the carbon-containing insulating films. The carbon composition of the carbon-containing insulating films is lowered in the end portions thereof than in the inner portions. The film density of the carbon-containing insulating films is raised in the end portions thereof than in the inner portions.

摘要翻译： 半导体芯片100包括半导体衬底（未示出）和形成在半导体衬底上的叠层膜150，其包括含碳绝缘膜如第一层间绝缘膜106和无碳绝缘膜，例如底层 层102和顶盖膜124。 这里的无碳绝缘膜的端面位于含碳绝缘膜的端面的外侧。 含碳绝缘膜的碳组成在其端部比在内部降低。 含碳绝缘膜的膜密度在其端部比在内部部分高。

公开(公告)号：US20060186549A1

公开(公告)日：2006-08-24

申请号：US11355003

申请日：2006-02-16

申请人： Tatsuya Usami ,  Koichi Ohto ,  Toshiyuki Takewaki

发明人： Tatsuya Usami ,  Koichi Ohto ,  Toshiyuki Takewaki

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L21/76867 ,  H01L21/02203 ,  H01L21/02329 ,  H01L21/3143 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76849 ,  H01L21/76886

摘要： A first gas including a silicon-containing compound is introduced into a vacuum chamber, to expose a semiconductor substrate placed in the chamber to the first gas atmosphere (silicon processing step). Then the pressure inside the vacuum chamber is reduced to a level lower than the pressure at the time of starting the silicon processing step (depressurizing step). Thereafter, a second gas including a nitrogen-containing compound is introduced into the vacuum chamber, and the semiconductor substrate is irradiated with the second gas plasma (nitrogen plasma step).

摘要翻译： 将包含含硅化合物的第一气体引入真空室中，以将放置在室内的半导体衬底暴露于第一气体气氛（硅处理步骤）。 然后将真空室内的压力降低到低于开始硅处理步骤（减压步骤）时的压力的水平。 此后，将包含含氮化合物的第二气体引入真空室中，并用第二气体等离子体（氮等离子体步骤）照射半导体衬底。

公开(公告)号：US20060060975A1

公开(公告)日：2006-03-23

申请号：US11219784

申请日：2005-09-07

申请人： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto

发明人： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto

IPC分类号： H01L21/4763 ,  H01L23/48

CPC分类号： H01L21/76834 ,  H01L21/76804 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76843 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device comprises a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device comprises an electric conductor, which is provided to extend through the multiple-layered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is provided so as to cover side surfaces and a bottom surface of the Cu film 120. This semiconductor device comprises an insulating film 116, which is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).

摘要翻译： 提供了一种用于抑制在半导体器件中发生的绝缘击穿的技术。 半导体器件包括半导体衬底（未示出），形成在半导体衬底上的层间绝缘膜102和设置在层间绝缘膜102上的多层绝缘膜140。 半导体器件包括导电体，其设置成延伸穿过多层绝缘膜140并且包括Cu膜120和阻挡金属膜118。 阻挡金属膜118被设置为覆盖Cu膜120的侧表面和底表面。 该半导体器件包括设置在多层绝缘膜140和导电体（即Cu膜120和阻挡金属膜118）之间的绝缘膜116。

公开(公告)号：US08642467B2

公开(公告)日：2014-02-04

申请号：US13348364

申请日：2012-01-11

申请人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

发明人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L21/022 ,  H01L21/02074 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3124 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/318 ,  H01L21/3185 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

摘要翻译： 在半导体器件中，在绝缘底层上形成具有凹槽的绝缘中间层。 不含金属硅化物的硅扩散金属层埋入槽内。 在硅扩散金属层和绝缘中间层上形成金属扩散阻挡层。

公开(公告)号：US07910474B2

公开(公告)日：2011-03-22

申请号：US12098190

申请日：2008-04-04

申请人： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Kazuhiko Endo

发明人： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Kazuhiko Endo

IPC分类号： H01L21/4763

CPC分类号： H01L21/76834 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.The barrier film (for instance, a second barrier film 6) disposed between the interconnection or the via plug and its overlying interlayer insulating film is made to have a layered structure made of a plurality of films containing silicon and carbon (preferably, silicon, carbon and nitrogen), with different carbon contents, and, in particular, a low-carbon-concentration film 6a with a small carbon content is set to be a lower layer therein and a high-carbon-concentration film 6b with a large carbon content is set to be an upper layer therein, whereby the effectual prevention against the Cu diffusion, a high etching selection ratio and good adhesiveness to the Cu interconnection can be certainly provided by the presence of the low-carbon-concentration film 6a, while the overall dielectric constant can be well reduced by the presence of the high-carbon-concentration film 6b.

摘要翻译： 本发明的目的是提供一种半导体器件，其包括其间的层间绝缘膜的蚀刻选择率高的阻挡膜，对Cu扩散的良好的预防功能，低介电常数和对Cu互连的优异粘合性 及其制造方法。 设置在互连或通孔插塞及其上覆层间绝缘膜之间的阻挡膜（例如，第二阻挡膜6）具有由多个含有硅和碳的膜（优选硅，碳 和氮），具有不同的碳含量，特别是具有小碳含量的低碳浓度膜6a被设定为下层，并且具有大碳含量的高碳浓度膜6b为 在其中设置为上层，由此通过低碳浓度膜6a的存在可以确定地提供对Cu扩散的有效防止，高的蚀刻选择率和对Cu互连的良好的粘合性，而整个电介质 通过高碳浓度膜6b的存在可以很好地降低常数。

公开(公告)号：US07897475B2

公开(公告)日：2011-03-01

申请号：US12073545

申请日：2008-03-06

申请人： Daisuke Oshida ,  Toshiyuki Takewaki ,  Takuji Onuma ,  Koichi Ohto

发明人： Daisuke Oshida ,  Toshiyuki Takewaki ,  Takuji Onuma ,  Koichi Ohto

IPC分类号： H01L21/20

CPC分类号： H01L28/84

摘要： A method of forming a semiconductor device, includes forming a lower electrode including a metal and a nitrogen on a semiconductor substrate, irradiating a reducing gas to a surface of the lower electrode, and irradiating a gas containing silicon to the surface of the lower electrode to form a projection containing silicide by reacting the metal with the silicon in an island shape on the surface of the lower electrode. Then, a capacitor film is formed on the lower electrode and the projection, and an upper electrode is formed on the capacitor film.

摘要翻译： 一种形成半导体器件的方法，包括在半导体衬底上形成包括金属和氮的下电极，将还原气体照射到下电极的表面，并将含硅的气体照射到下电极的表面，以 通过在下电极的表面上使金属与岛状的硅反应形成包含硅化物的突起。 然后，在下电极和突起上形成电容器膜，并且在电容器膜上形成上电极。

公开(公告)号：US07833901B2

公开(公告)日：2010-11-16

申请号：US11591704

申请日：2006-11-02

申请人： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

发明人： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

IPC分类号： H01L21/4763

CPC分类号： H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of manufacturing a semiconductor device where at least one insulating layer structure having a metal wiring constitution is formed to thereby construct a multi-layered wiring arrangement, a first SiOCH layer is produced. Then, a surface section of the first SiOCH layer is treated to change the surface section of the first SiOCH layer to a second SiOCH layer which features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer and an oxygen (O) density higher than that of the first SiOCH layer. Finally, a silicon dioxide (SiO2) layer is formed on the second SiOCH layer.

摘要翻译： 在制造其中形成具有金属布线结构的至少一个绝缘层结构从而构成多层布线布置的半导体器件的方法中，制造第一SiOCH层。 然后，处理第一SiOCH层的表面部分以将第一SiOCH层的表面部分改变为具有比（C）密度低于第一SiOCH层的碳（C）密度的第二SiOCH层，氢（H）密度 低于第一SiOCH层，氧（O）密度高于第一SiOCH层。 最后，在第二SiOCH层上形成二氧化硅（SiO 2）层。

公开(公告)号：US20100224995A1

公开(公告)日：2010-09-09

申请号：US12773493

申请日：2010-05-04

申请人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

发明人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

IPC分类号： H01L23/532

CPC分类号： H01L21/022 ,  H01L21/02074 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3124 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/318 ,  H01L21/3185 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

摘要翻译： 在半导体器件中，在绝缘底层上形成具有凹槽的绝缘中间层。 不含金属硅化物的硅扩散金属层埋入槽内。 在硅扩散金属层和绝缘中间层上形成金属扩散阻挡层。