公开(公告)号：US08254472B2

公开(公告)日：2012-08-28

申请号：US12697677

申请日：2010-02-01

Applicant: Noboru Morita ,  Michio Hibi ,  Manabu Yamazaki

Inventor： Noboru Morita ,  Michio Hibi ,  Manabu Yamazaki

IPC: H04L27/00

CPC classification number: H04L25/03006 ,  H04L25/03878

Abstract: A communication device includes a storage unit that stores a predetermined eye mask pattern indicating a receivable range, a receiving unit that receives data from the other communication device, a waveform comparing unit for comparing a waveform of the received data with the eye mask pattern to generate comparison result data and a transmission unit for transmitting the comparison result data to the other communication device.

Abstract translation: 通信装置包括存储单元，其存储指示可接收范围的预定眼图模式，从另一通信装置接收数据的接收单元，用于将接收数据的波形与眼屏图案进行比较的波形比较单元，生成 比较结果数据和用于将比较结果数据发送到另一通信设备的发送单元。

公开(公告)号：US07910474B2

公开(公告)日：2011-03-22

申请号：US12098190

申请日：2008-04-04

Applicant: Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Kazuhiko Endo

Inventor： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Kazuhiko Endo

IPC: H01L21/4763

CPC classification number: H01L21/76834 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.The barrier film (for instance, a second barrier film 6) disposed between the interconnection or the via plug and its overlying interlayer insulating film is made to have a layered structure made of a plurality of films containing silicon and carbon (preferably, silicon, carbon and nitrogen), with different carbon contents, and, in particular, a low-carbon-concentration film 6a with a small carbon content is set to be a lower layer therein and a high-carbon-concentration film 6b with a large carbon content is set to be an upper layer therein, whereby the effectual prevention against the Cu diffusion, a high etching selection ratio and good adhesiveness to the Cu interconnection can be certainly provided by the presence of the low-carbon-concentration film 6a, while the overall dielectric constant can be well reduced by the presence of the high-carbon-concentration film 6b.

Abstract translation: 本发明的目的是提供一种半导体器件，其包括其间的层间绝缘膜的蚀刻选择率高的阻挡膜，对Cu扩散的良好的预防功能，低介电常数和对Cu互连的优异粘合性 及其制造方法。 设置在互连或通孔插塞及其上覆层间绝缘膜之间的阻挡膜（例如，第二阻挡膜6）具有由多个含有硅和碳的膜（优选硅，碳 和氮），具有不同的碳含量，特别是具有小碳含量的低碳浓度膜6a被设定为下层，并且具有大碳含量的高碳浓度膜6b为 在其中设置为上层，由此通过低碳浓度膜6a的存在可以确定地提供对Cu扩散的有效防止，高的蚀刻选择率和对Cu互连的良好的粘合性，而整个电介质 通过高碳浓度膜6b的存在可以很好地降低常数。

公开(公告)号：US07833901B2

公开(公告)日：2010-11-16

申请号：US11591704

申请日：2006-11-02

Applicant: Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

Inventor： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

IPC: H01L21/4763

CPC classification number: H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a method of manufacturing a semiconductor device where at least one insulating layer structure having a metal wiring constitution is formed to thereby construct a multi-layered wiring arrangement, a first SiOCH layer is produced. Then, a surface section of the first SiOCH layer is treated to change the surface section of the first SiOCH layer to a second SiOCH layer which features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer and an oxygen (O) density higher than that of the first SiOCH layer. Finally, a silicon dioxide (SiO2) layer is formed on the second SiOCH layer.

Abstract translation: 在制造其中形成具有金属布线结构的至少一个绝缘层结构从而构成多层布线布置的半导体器件的方法中，制造第一SiOCH层。 然后，处理第一SiOCH层的表面部分以将第一SiOCH层的表面部分改变为具有比（C）密度低于第一SiOCH层的碳（C）密度的第二SiOCH层，氢（H）密度 低于第一SiOCH层，氧（O）密度高于第一SiOCH层。 最后，在第二SiOCH层上形成二氧化硅（SiO 2）层。

公开(公告)号：US07763979B2

公开(公告)日：2010-07-27

申请号：US11534941

申请日：2006-09-25

Applicant: Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Kazuhiko Endo

Inventor： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Kazuhiko Endo

IPC: H01L25/34

CPC classification number: H01L21/7681 ,  C23C16/30 ,  C23C16/36 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

Abstract: The dielectric constants of SiC and SiCN that are currently the subjects of much investigation are both 4.5 to 5 or so and that of SiOC, 2.8 to 3.0 or so. With further miniaturization of the interconnection size and the spacing of interconnections brought about by the reduction in device size, there have arisen strong demands that dielectric constants should be further reduced.Furthermore, because the etching selection ratio of SiOC to SiCN as well as that of SiOC to SiC are small, if SiCN or SiC is used as the etching stopper film, the surface of the metal interconnection layer may be oxidized at the time of photoresist removal, which gives rise to a problem of high contact resistance.The present invention relates to an organic film made of one of SiOCH, SiCHN and SiCH that is formed using, as a source, a polyorganosilane whose C/Si ratio is at least 5 or greater and molecular weight is 100 or greater, and a semiconductor device wherein such an organic insulating film is used, and more particularly to a semiconductor device having a trench structure.

Abstract translation: 目前被广泛研究的SiC和SiCN的介电常数分别为4.5〜5左右，SiOC为2.8〜3.0左右。 随着器件尺寸减小引起的互连尺寸和互连间距的进一步小型化，出现了强烈的要求，即应进一步降低介电常数。 此外，由于SiOC与SiCN的蚀刻选择比以及SiOC与SiC的蚀刻选择比小，因此如果使用SiCN或SiC作为蚀刻停止膜，则金属配线层的表面在光刻胶去除时可能被氧化 ，这导致高接触电阻的问题。 本发明涉及使用以C / Si比为5以上且分子量为100以上的聚有机硅烷作为源的SiOCH，SiCHN和SiCH之一构成的有机膜，以及半导体 使用这种有机绝缘膜的装置，更具体地说涉及具有沟槽结构的半导体器件。

公开(公告)号：US07634524B2

公开(公告)日：2009-12-15

申请号：US10823570

申请日：2004-04-14

Applicant: Shigeaki Okutani ,  Toshiro Nakazuru ,  Noboru Morita

Inventor： Shigeaki Okutani ,  Toshiro Nakazuru ,  Noboru Morita

IPC: G06F1/02

CPC classification number: G06F17/142

Abstract: A cyclic equation setting unit transforms and sets a Taylor series equation for calculating a sine function into a single cyclic equation common to terms of the Taylor series equation, the single cyclic equation having a new known number Q that is defined by multiplying a known number Q and the square of a variable X, shifting the result by a shift number S and then adding a constant K thereto. An adjustment unit adjusts and prepares the shift number S such that within a variation range of the variable X the variable X has a maximum value 1 with the constant K being not greater than 1. A cyclic equation executing unit inputs and converts angle information i to the variable X, and executing the cyclic equation in sequence from higher order term to lower order term for the number of terms of the Taylor series equation to derive a sine function of the angle information i.

Abstract translation: 循环方程设置单元将用于计算正弦函数的泰勒级数方程转换并设置为与泰勒级数方程式相同的单个循环方程，具有新的已知数Q的单个循环方程式通过将已知数量Q 和变量X的平方，将结果移位移位数S，然后向其中加上常数K. 调整单元调整并准备移位号S，使得在变量X的变化范围内，变量X具有常数K不大于1的最大值1.循环方程执行单元输入并转换角度信息i至 变量X，并且对于泰勒级数方程的项数，从高阶项到低阶项顺序执行循环方程，以导出角度信息i的正弦函数。

公开(公告)号：US07582970B2

公开(公告)日：2009-09-01

申请号：US12180652

申请日：2008-07-28

Applicant: Sadayuki Ohnishi ,  Kouichi Owto ,  Tatsuya Usami ,  Noboru Morita ,  Kouji Arita ,  Ryouhei Kitao ,  Youichi Sasaki

Inventor： Sadayuki Ohnishi ,  Kouichi Owto ,  Tatsuya Usami ,  Noboru Morita ,  Kouji Arita ,  Ryouhei Kitao ,  Youichi Sasaki

IPC: H01L23/48

CPC classification number: H01L21/02126 ,  C23C16/401 ,  H01L21/02137 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/31633 ,  H01L21/76801 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal wiring conductor. A metal plug is formed by filling the opening with Cu containing metal via a barrier metal. The interlayer insulating film includes the insulating film which includes a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond in the carbon containing silicon oxide film. The proportion of Si—CH2 bond (1360 cm-1) to Si—CH3 bond (1270 cm-1) in the insulating film is in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum.

Abstract translation: 半导体器件包括形成在半导体衬底上或之上的层间绝缘膜。 在层间绝缘膜中形成开口并到达下层金属布线导体。 通过阻挡金属通过用含Cu金属填充开口来形成金属塞。 层间绝缘膜包括含碳氧化硅膜中具有Si-CH2键的含碳氧化硅（SiOCH）膜的绝缘膜。 绝缘膜中的Si-CH 2键（1360cm -1）与Si-CH 3键（1270cm -1）的比例在以FTIR光谱的峰高比测定的0.03〜0.05的范围内。

公开(公告)号：US07473630B2

公开(公告)日：2009-01-06

申请号：US11542212

申请日：2006-10-04

Applicant: Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto

Inventor： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto

IPC: H01L21/20 ,  H01L21/44

CPC classification number: H01L21/76834 ,  H01L21/76804 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76843 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device also includes an electric conductor that extends through the multiple-layered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is covers side surfaces and a bottom surface of the Cu film 120. An insulating film 116 is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).

Abstract translation: 提供了一种用于抑制在半导体器件中发生的绝缘击穿的技术。 半导体器件包括半导体衬底（未示出），形成在半导体衬底上的层间绝缘膜102和设置在层间绝缘膜102上的多层绝缘膜140.半导体器件还包括延伸穿过 多层绝缘膜140，并且包括Cu膜120和阻挡金属膜118.阻挡金属膜118覆盖Cu膜120的侧表面和底表面。绝缘膜116设置在多层绝缘体 膜140和导电体（即Cu膜120和阻挡金属膜118）。

公开(公告)号：US20080194102A1

公开(公告)日：2008-08-14

申请号：US12098190

申请日：2008-04-04

Applicant: Tatsuya USAMI ,  Noboru MORITA ,  Koichi OHTO ,  Kazuhiko ENDO

Inventor： Tatsuya USAMI ,  Noboru MORITA ,  Koichi OHTO ,  Kazuhiko ENDO

IPC: H01L21/768

CPC classification number: H01L21/76834 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.The barrier film (for instance, a second barrier film 6) disposed between the interconnection or the via plug and its overlying interlayer insulating film is made to have a layered structure made of a plurality of films containing silicon and carbon (preferably, silicon, carbon and nitrogen), with different carbon contents, and, in particular, a low-carbon-concentration film 6a with a small carbon content is set to be a lower layer therein and a high-carbon-concentration film 6b with a large carbon content is set to be an upper layer therein, whereby the effectual prevention against the Cu diffusion, a high etching selection ratio and good adhesiveness to the Cu interconnection can be certainly provided by the presence of the low-carbon-concentration film 6a, while the overall dielectric constant can be well reduced by the presence of the high-carbon-concentration film 6b.

Abstract translation: 本发明的目的是提供一种半导体器件，其包括其间的层间绝缘膜的蚀刻选择率高的阻挡膜，对Cu扩散的良好的预防功能，低介电常数和对Cu互连的优异粘合性 及其制造方法。 设置在互连或通孔插塞及其上覆层间绝缘膜之间的阻挡膜（例如，第二阻挡膜6）具有由多个含有硅和碳的膜（优选硅，碳 和氮），具有不同的碳含量，特别是具有小碳含量的低碳浓度膜6a被设定为下层，并且具有大碳的高碳浓度膜6b 含量被设定为上层，由此可以通过低碳浓度膜6a的存在来确定地提供对Cu扩散的有效防止，高的蚀刻选择率和对Cu互连的良好的粘附性，同时 通过存在高碳浓度膜6b可以很好地降低总介电常数。

公开(公告)号：US07391115B2

公开(公告)日：2008-06-24

申请号：US10768676

申请日：2004-02-02

Applicant: Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Kazuhiko Endo

Inventor： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Kazuhiko Endo

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L21/76834 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.The barrier film (for instance, a second barrier film 6) disposed between the interconnection or the via plug and its overlying interlayer insulating film is made to have a layered structure made of a plurality of films containing silicon and carbon (preferably, silicon, carbon and nitrogen), with different carbon contents, and, in particular, a low-carbon-concentration film 6a with a small carbon content is set to be a lower layer therein and a high-carbon-concentration film 6b with a large carbon content is set to be an upper layer therein, whereby the effectual prevention against the Cu diffusion, a high etching selection ratio and good adhesiveness to the Cu interconnection can be certainly provided by the presence of the low-carbon-concentration film 6a, while the overall dielectric constant can be well reduced by the presence of the high-carbon-concentration film 6b.

Abstract translation: 本发明的目的是提供一种半导体器件，其包括其间的层间绝缘膜的蚀刻选择率高的阻挡膜，对Cu扩散的良好的预防功能，低介电常数和对Cu互连的优异粘合性 及其制造方法。 设置在互连或通孔插塞及其上覆层间绝缘膜之间的阻挡膜（例如，第二阻挡膜6）具有由多个含有硅和碳的膜（优选硅，碳 和氮），具有不同的碳含量，特别是具有小碳含量的低碳浓度膜6a被设定为下层，并且具有大碳的高碳浓度膜6b 含量被设定为上层，由此可以通过低碳浓度膜6a的存在来确定地提供对Cu扩散的有效防止，高的蚀刻选择率和对Cu互连的良好的粘附性，同时 通过存在高碳浓度膜6b可以很好地降低总介电常数。

公开(公告)号：US07135776B2

公开(公告)日：2006-11-14

申请号：US11219784

申请日：2005-09-07

Applicant: Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto

Inventor： Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto

IPC: H01L23/48

CPC classification number: H01L21/76834 ,  H01L21/76804 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76843 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device also includes an electric conductor that extends through the multiplelayered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is covers side surfaces and a bottom surface of the Cu film 120. An insulating film 116 is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).

Abstract translation: 提供了一种用于抑制在半导体器件中发生的绝缘击穿的技术。 半导体器件包括半导体衬底（未示出），形成在半导体衬底上的层间绝缘膜102和设置在层间绝缘膜102上的多层绝缘膜140。 半导体器件还包括延伸穿过多层绝缘膜140并包括Cu膜120和阻挡金属膜118的电导体。 阻挡金属膜118覆盖Cu膜120的侧表面和底表面。 绝缘膜116设置在多层绝缘膜140和导电体（即Cu膜120和阻挡金属膜118）之间。