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公开(公告)号：US20190140172A1
公开(公告)日：2019-05-09
申请号：US15805209
申请日：2017-11-07
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Dai-Ying Lee , Po-Hao Tseng , Feng-Min Lee , Yu-Yu Lin , Kai-Chieh Hsu
Abstract: A contact hole structure includes a substrate, an interlayer dielectric (ILD), a conductive layer and an insulating capping layer. The ILD is disposed on the substrate and has a first opening. The conductive layer is disposed in the ILD and aligns the first opening. The insulating capping layer has a spacer disposed on a first sidewall of the first opening, wherein the spacer contacts to the conductive layer and defines a second opening in the first opening, so as to expose a portion of the conductive layer.
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公开(公告)号：US10115769B1
公开(公告)日：2018-10-30
申请号：US15620880
申请日：2017-06-13
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao Tseng , Feng-Min Lee , Yu-Yu Lin , Kai-Chieh Hsu
Abstract: A ReRAM device is provided. The ReRAM device comprises a first dielectric layer disposed on a substrate and covering a gate oxide structure on the substrate, a first conductive connecting structure disposed on the substrate and penetrating the first dielectric layer, and a ReRAM unit disposed on the first conductive connecting structure. The first dielectric layer comprises a first insulating layer disposed on the substrate, and a stop layer disposed on the first insulating layer and contacting a top surface of the gate oxide structure, wherein the stop layer is a hydrogen controlled layer.
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公开(公告)号：US12260913B2
公开(公告)日：2025-03-25
申请号：US18166484
申请日：2023-02-09
Applicant: MACRONIX International Co., Ltd.
Inventor： Yu-Hsuan Lin , Po-Hao Tseng
Abstract: A hyperdimensional computing device includes a non-volatile memory cell array and a first operation circuit. The non-volatile memory cell array is coupled to a plurality of first word lines. The non-volatile memory cell array has a plurality of memory cell groups, a plurality of first memory cells of each of the memory cell groups are coupled to a same first word line of the first word lines, and the memory cell groups respectively store a plurality of data vectors. The first operation circuit receives at least one of the data vectors through bit lines and generates a bundled data vector according to the at least one of the data vectors.
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公开(公告)号：US20240274164A1
公开(公告)日：2024-08-15
申请号：US18166495
申请日：2023-02-09
Applicant: MACRONIX International Co., Ltd.
Inventor： Po-Hao Tseng , Feng-Min Lee , Tian-Cih Bo
CPC classification number: G11C7/1069 , G11C8/08
Abstract: A memory device and an in-memory search method thereof are provided. The in-memory search method includes: providing, in a first stage, a first voltage or a second voltage to a word line of at least one target memory cell according to a logical status of searched data, and reading a first current; providing, in a second stage, a third voltage or a fourth voltage to the word line of the at least one target memory cell according to the logical status of the searched data, and reading a second current; and obtaining a search result according to a difference between the second current and the first current.
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公开(公告)号：US11967378B2
公开(公告)日：2024-04-23
申请号：US17830427
申请日：2022-06-02
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao Tseng
IPC: G11C15/04
CPC classification number: G11C15/04
Abstract: The application discloses an analog content addressable memory (CAM) device, an analog CAM cell and a method for data searching and comparing thereof. The CAM cell includes: a first memory cell and a second memory cell coupled to each other, wherein the analog CAM cell stores analog storage data which is corresponding to a match range, the match range is determined based on first and second threshold voltages of the analog CAM cell; an analog search data is converted into first and second analog search voltages; the first and the second memory cells receive the first and the second analog search voltages; and the analog CAM memory cell generates a memory cell current, or the analog CAM memory cell keeps or discharges a match line voltage on a match line coupled to the analog CAM memory cell.
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Patent Agency Ranking
公开(公告)号：US11923008B2
公开(公告)日：2024-03-05
申请号：US18155827
申请日：2023-01-18
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao Tseng , Feng-Min Lee , Ming-Hsiu Lee
IPC: G11C11/404 , G11C15/04 , G11C16/04
CPC classification number: G11C15/04 , G11C15/046 , G11C11/404 , G11C16/0458 , G11C16/0475 , G11C2211/4013 , G11C2211/4016
Abstract: A TCAM comprises a plurality of first search lines, a plurality of second search lines, a plurality of memory cell strings and one or more current sensing units. The memory cell strings comprise a plurality of memory cells. The current sensing units are coupled to the memory cell strings. In a search operation, a determination that whether any of the data stored in the memory cell strings matches a data string to be searched is made according to whether the one or more current sensing units detect current from the memory cell strings, or according to the magnitude of the current flowing out from the memory cell strings detected by the one or more current sensing units. Each memory cell includes a first transistor and a second transistor. Gates of the first and second transistors are coupled to a corresponding first search line and a corresponding second search line.
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公开(公告)号：US11871588B2
公开(公告)日：2024-01-09
申请号：US17392365
申请日：2021-08-03
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Feng-Min Lee , Erh-Kun Lai , Dai-Ying Lee , Yu-Hsuan Lin , Po-Hao Tseng , Ming-Hsiu Lee
CPC classification number: H10B63/845 , H10B61/22 , H10B63/34 , H10N50/01 , H10N70/066
Abstract: A memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.
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公开(公告)号：US11776618B2
公开(公告)日：2023-10-03
申请号：US17520749
申请日：2021-11-08
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao Tseng
IPC: G11C15/00 , G11C11/4093 , G11C11/4096 , G11C11/4072 , G11C11/4074 , G11C11/408 , G11C16/00 , G11C15/04
CPC classification number: G11C11/4093 , G11C11/4072 , G11C11/4074 , G11C11/4085 , G11C11/4096 , G11C15/046 , G11C16/00 , G11C15/00
Abstract: The present invention discloses a memory device and operation method thereof. The operation method comprises: programming a plurality of first strings of a plurality of string pairs representing a finite state machine (FSM) to an in-memory-searching (IMS) array of a memory device; programming a plurality of second strings of the string pairs to a working memory of the memory device; and programming a string representing a starting state of the FSM to a buffer of the memory device.
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公开(公告)号：US11587623B2
公开(公告)日：2023-02-21
申请号：US17320336
申请日：2021-05-14
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao Tseng , Yu-Hsuan Lin , Feng-Min Lee , Ming-Hsiu Lee
Abstract: A content-address memory (CAM) and an operation method are provided. The content-address memory comprises: a plurality of first signal lines; a plurality of second signal lines; and a plurality of CAM memory cells coupled to the first signal lines and the second signal lines, wherein in data match, a plurality of input signals are input into the CAM memory cells via the first signal lines; the input signals are compared with contents stored in the CAM memory cells; and a match result is determined based on an electrical characteristic of the second signal lines.
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公开(公告)号：US11557354B2
公开(公告)日：2023-01-17
申请号：US17166484
申请日：2021-02-03
Applicant: MACRONIX International Co., Ltd.
Inventor： Feng-Min Lee , Po-Hao Tseng , Yu-Hsuan Lin , Ming-Hsiu Lee
IPC: G11C16/30 , H01L29/788 , G11C16/24 , G11C16/08 , G11C16/16 , H01L29/792 , H01L29/423 , H01L27/11573 , H01L27/11524 , H01L27/11529 , G11C11/56 , H01L27/1157
Abstract: A flash memory cell includes a rectifying device and a transistor. The rectifying device has an input end coupled to a bit line. The transistor has a charge storage structure. The transistor has a first end coupled to an output end of the rectifying device, the transistor has a second end coupled to a source line, and a control end of the transistor is coupled to a word line.
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