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公开(公告)号:US12057179B2
公开(公告)日:2024-08-06
申请号:US17686469
申请日:2022-03-04
发明人: Po-Hao Tseng
CPC分类号: G11C16/3404 , G11C16/08 , G11C16/102 , G11C16/26 , G11C16/30
摘要: A memory device, which includes a first driving circuit, a second driving circuit, a sensing circuit and an in-memory search (IMS) array. Memory units of the in-memory search array are arranged as a plurality of horizontal rows and vertical columns. Control terminal of each the memory unit in the same vertical column is coupled to the first driving circuit through a word line. The memory units of the same vertical column are connected in series and coupled to the second driving circuit through a bit line, and coupled to the sensing circuit through a source line. Every 2N adjacent memory units in the same vertical column are arranged as a memory unit to store an encoded data of 2N bits corresponding to an original data of M bits, where N and M are positive integers, and N is greater than or equal to two.
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公开(公告)号:US11823749B2
公开(公告)日:2023-11-21
申请号:US17471193
申请日:2021-09-10
发明人: Po-Hao Tseng , Feng-Min Lee , Ming-Hsiu Lee
CPC分类号: G11C16/3404 , G11C15/04 , G11C16/08 , G11C16/102 , G11C16/26 , G11C16/30
摘要: The application provides a Content Addressable Memory (CAM) cell, a CAM memory device and an operation method thereof. The CAM cell includes: a plurality of parallel-coupled flash memory cells: wherein a storage data of the CAM cell is based on a combination of a plurality of threshold voltages of the parallel-coupled flash memory cells.
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公开(公告)号:US11587611B2
公开(公告)日:2023-02-21
申请号:US17380056
申请日:2021-07-20
发明人: Ming-Hsiu Lee , Po-Hao Tseng , Yu-Hsuan Lin
IPC分类号: G11C7/22 , G11C11/4096 , G11C11/4094 , G11C11/408
摘要: A memory device for data searching and a data searching method thereof are provided. The data searching method includes the following steps. A searching word is received and then divided into a plurality of sections. The sections are encoded as a plurality of encoded sections, so that the encoded sections may correspond to a plurality of memory blocks in a memory array. The encoded sections are directed into the memory blocks to perform data comparisons and obtaining a respective result of data comparison. Thereafter, addresses of bit lines which match the searching word are obtained according to respective result of data comparison for each of memory block.
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4.
公开(公告)号:US10103895B1
公开(公告)日:2018-10-16
申请号:US15782890
申请日:2017-10-13
发明人: Po-Hao Tseng , Yu-Yu Lin , Kai-Chieh Hsu , Feng-Min Lee
摘要: A method for physically unclonable function-identification (PUF-ID) generation includes: providing a PUF array having programmable resistance memory cells; performing a forming procedure followed by a programming procedure on all of the programmable resistance memory cells of the PUF array; performing an estimation process to estimate randomness of the PUF array, by comparing a reference current of a base unit to a total current passing through all of the programmable resistance memory cells for obtaining a PUF randomness; determining a setting result of randomness based on the estimation process; and generating a PUF-ID according to the setting result of randomness.
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公开(公告)号:US20180277198A1
公开(公告)日:2018-09-27
申请号:US15464377
申请日:2017-03-21
发明人: Po-Hao Tseng , Kai-Chieh Hsu
IPC分类号: G11C11/419 , H01L23/00 , H01L27/11 , H01L23/535
CPC分类号: H01L23/535 , G11C7/1006 , G11C7/24 , G11C17/16 , H01L23/57 , H01L27/11226
摘要: A semiconductor device includes a programmable memory array comprising plural memory units disposed above a substrate. One of the memory units comprises a gate electrode disposed above the substrate, a conductive portion spaced apart from the gate electrode, and a dielectric layer contacting the conductive portion and separated from the gate electrode, and the dielectric layer defining a threshold voltage of the related memory unit, wherein at least two of the memory units have different threshold voltages.
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公开(公告)号:US20170345870A1
公开(公告)日:2017-11-30
申请号:US15291203
申请日:2016-10-12
发明人: Po-Hao Tseng , Dai-Ying Lee , Erh-Kun Lai
CPC分类号: H01L27/2436 , H01L45/122 , H01L45/1233 , H01L45/1273 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1608
摘要: A resistive memory includes a semiconductor substrate, a dielectric layer, an insulating layer and a metal electrode layer. The semiconductor substrate has a top surface and a recess extending downwards into the semiconductor substrate from the top surface. The dielectric layer is disposed on the semiconductor substrate and has a first through-hole aligning the recess. The insulating layer is disposed in the first through-hole and the recess. The metal electrode layer is disposed on the insulating layer by which the metal electrode layer is isolated from the semiconductor substrate.
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公开(公告)号:US12094534B2
公开(公告)日:2024-09-17
申请号:US18459461
申请日:2023-09-01
发明人: Yu-Hsuan Lin , Po-Hao Tseng
CPC分类号: G11C15/046 , G11C7/14
摘要: The application provides a content addressable memory (CAM) memory device, a CAM cell and a method for searching and comparing data thereof. The CAM device includes: a plurality of CAM cells; and an electrical characteristic detection circuit coupled to the CAM cells; wherein in data searching, a search data is compared with a storage data stored in the CAM cells, the CAM cells generate a plurality of memory cell currents, the electrical characteristic detection circuit detects the memory cell currents to generate a plurality of sensing results, or the electrical characteristic detection circuit detects a plurality of match line voltages on a plurality of match lines coupled to the CAM cells to generate the plurality of search results; and the storage data is a single-bit multi-level storage data and/or the search data is a single-bit multi-level search data.
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8.
公开(公告)号:US12069857B2
公开(公告)日:2024-08-20
申请号:US17408535
申请日:2021-08-23
发明人: Yu-Hsuan Lin , Feng-Min Lee , Po-Hao Tseng
CPC分类号: H10B41/35 , H01L29/40114 , H01L29/66825
摘要: The application discloses an integrated memory device, a manufacturing method and an operation method thereof. The integrated memory cell includes: a first memory cell; and an embedded second memory cell, serially coupled to the first memory cell, wherein the embedded second memory cell is formed on any one of a first side and a second side of the first memory cell.
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公开(公告)号:US11875850B2
公开(公告)日:2024-01-16
申请号:US17730259
申请日:2022-04-27
发明人: Po-Hao Tseng
IPC分类号: G11C15/04
CPC分类号: G11C15/046
摘要: The application provides a content addressable memory (CAM) memory device, a CAM memory cell and a method for searching and comparing data thereof. The CAM memory device includes: a plurality of CAM memory strings; and an electrical characteristic detection circuit. In data searching, a search data is compared with a storage data stored in the CAM memory strings, the CAM memory strings generate a plurality of memory string currents, the electrical characteristic detection circuit detects the memory string currents to generate a plurality of sensing results, or detects a plurality of match line voltages on a plurality of match lines coupled to the CAM memory string to generate the plurality of search results. The storage data and the search data is a range storage data and a single-bit search data, or the storage data and the search data is a single-bit storage data and a range search data.
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公开(公告)号:US11790990B2
公开(公告)日:2023-10-17
申请号:US17717192
申请日:2022-04-11
发明人: Yu-Hsuan Lin , Po-Hao Tseng
CPC分类号: G11C15/046 , G11C7/14
摘要: The application provides a content addressable memory (CAM) memory device, a CAM memory cell and a method for searching and comparing data thereof. The CAM memory device includes: a plurality of CAM memory cells; and an electrical characteristic detection circuit coupled to the CAM memory cells; wherein in data searching, a search data is compared with a storage data stored in the CAM memory cells, the CAM memory cells generate a plurality of memory cell currents, the electrical characteristic detection circuit detects the memory cell currents to generate a plurality of sensing results, or the electrical characteristic detection circuit detects a plurality of match line voltages on a plurality of match lines coupled to the CAM memory cells to generate the plurality of search results; and the storage data is a single-bit multi-level storage data and/or the search data is a single-bit multi-level search data.
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